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Searched refs:IMX7ULP_CLK_DDR_DIV (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dimx7ulp-clock.h45 #define IMX7ULP_CLK_DDR_DIV 32 macro
/Linux-v5.4/arch/arm/boot/dts/
Dimx7ulp.dtsi273 <&scg1 IMX7ULP_CLK_DDR_DIV>,
306 <&scg1 IMX7ULP_CLK_DDR_DIV>,
/Linux-v5.4/Documentation/devicetree/bindings/clock/
Dimx7ulp-clock.txt79 <&scg1 IMX7ULP_CLK_DDR_DIV>,
/Linux-v5.4/drivers/clk/imx/
Dclk-imx7ulp.c126 …clks[IMX7ULP_CLK_DDR_DIV] = imx_clk_divider_gate("ddr_clk", "ddr_sel", CLK_SET_RATE_PARENT | CLK_I… in imx7ulp_clk_scg1_init()