Searched refs:IMX7D_ENET1_TIME_ROOT_CLK (Results 1 – 10 of 10) sorted by relevance
171 #define IMX7D_ENET1_TIME_ROOT_CLK 162 macro
58 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
44 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
109 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,113 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
92 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
128 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
194 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
212 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
1182 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
809 …hws[IMX7D_ENET1_TIME_ROOT_CLK] = imx_clk_hw_gate2_shared2("enet1_time_root_clk", "enet1_time_post_… in imx7d_clocks_init()