Searched refs:IMX6UL_CLK_PLL6_ENET (Results 1 – 2 of 2) sorted by relevance
39 #define IMX6UL_CLK_PLL6_ENET 30 macro
180 hws[IMX6UL_CLK_PLL6_ENET] = imx_clk_hw_gate("pll6_enet", "pll6_bypass", base + 0xe0, 13); in imx6ul_clocks_init()
