Searched refs:IMX6SX_CLK_PLL4_POST_DIV (Results 1 – 2 of 2) sorted by relevance
40 #define IMX6SX_CLK_PLL4_POST_DIV 31 macro
254 hws[IMX6SX_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", in imx6sx_clocks_init()
