Searched refs:IMX6QDL_CLK_PLL5_VIDEO_DIV (Results 1 – 4 of 4) sorted by relevance
| /Linux-v5.4/arch/arm/boot/dts/ |
| D | imx6q-logicpd.dts | 65 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
66 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
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| D | imx6q-b850v3.dts | 61 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
62 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
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| /Linux-v5.4/drivers/clk/imx/ |
| D | clk-imx6q.c | 152 case IMX6QDL_CLK_PLL5_VIDEO_DIV: in ldb_di_sel_by_clock_id()
603 …hws[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post… in imx6q_clocks_init()
925 clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI0_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()
926 clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()
927 clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI0_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()
928 clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()
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| /Linux-v5.4/include/dt-bindings/clock/ |
| D | imx6qdl-clock.h | 205 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro
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