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Searched refs:IMX6QDL_CLK_PLL2_PFD2_396M (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.4/arch/arm/boot/dts/
Dimx6q-logicpd.dts67 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
68 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
Dimx6q.dtsi43 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
77 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
111 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
145 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
Dimx6dl.dtsi38 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
68 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
Dimx6q-b850v3.dts63 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
64 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
/Linux-v5.4/include/dt-bindings/clock/
Dimx6qdl-clock.h15 #define IMX6QDL_CLK_PLL2_PFD2_396M 6 macro
/Linux-v5.4/drivers/clk/imx/
Dclk-imx6q.c159 case IMX6QDL_CLK_PLL2_PFD2_396M: in ldb_di_sel_by_clock_id()
352 hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk)) { in init_ldb_clks()
405 hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk) in disable_anatop_clocks()
581 …hws[IMX6QDL_CLK_PLL2_PFD2_396M] = imx_clk_hw_pfd("pll2_pfd2_396m", "pll2_bus", base + 0x100, 2… in imx6q_clocks_init()
939 clk_set_parent(hws[IMX6QDL_CLK_ENFC_SEL]->clk, hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk); in imx6q_clocks_init()