Searched refs:IMX6QDL_CLK_IPU1_DI1_PRE_SEL (Results 1 – 2 of 2) sorted by relevance
45 #define IMX6QDL_CLK_IPU1_DI1_PRE_SEL 36 macro
663 …hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL] = imx_clk_hw_mux_flags("ipu1_di1_pre_sel", base + 0x34, 15, 3, i… in imx6q_clocks_init()926 clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()
