Searched refs:IDE1_SECONDARY_BASE (Results 1 – 3 of 3) sorted by relevance
51 #define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */ macro119 SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); in smsc_superio_setup()120 SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1); in smsc_superio_setup()
83 #define IDE1_SECONDARY_BASE 0x03f6 macro143 SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8, in smsc_superio_setup()145 SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff, in smsc_superio_setup()
16 #define IDE1_SECONDARY_BASE 0x170 macro
