Searched refs:HSW_TVIDEO_DIP_CTL (Results 1 – 3 of 3) sorted by relevance
512 i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); in hsw_write_infoframe()547 val = I915_READ(HSW_TVIDEO_DIP_CTL(cpu_transcoder)); in hsw_read_infoframe()558 u32 val = I915_READ(HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder)); in hsw_infoframes_enabled()1189 i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder); in hsw_set_infoframes()
2434 MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_A), D_ALL); in init_generic_mmio_info()2435 MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_B), D_ALL); in init_generic_mmio_info()2436 MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_C), D_ALL); in init_generic_mmio_info()
8232 #define HSW_TVIDEO_DIP_CTL(trans) _MMIO_TRANS2(trans, _HSW_VIDEO_DIP_CTL_A) macro
