Searched refs:HSIO_PLL5G_CFG0_CPU_CLK_DIV (Results 1 – 2 of 2) sorted by relevance
407 HSIO_PLL5G_CFG0_CPU_CLK_DIV(2) | in ocelot_pll5_init()
103 #define HSIO_PLL5G_CFG0_CPU_CLK_DIV(x) (((x) << 6) & GENMASK(11, 6)) macro
