Searched refs:HHI_VIID_CLK_CNTL (Results 1 – 8 of 8) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/meson/ |
| D | meson_vclk.c | 60 #define HHI_VIID_CLK_CNTL 0x12c /* 0x4b offset in data sheet */ macro 293 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, VCLK2_EN, 0); in meson_venci_cvbs_clock_config() 304 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config() 307 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config() 311 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, VCLK2_EN, VCLK2_EN); in meson_venci_cvbs_clock_config() 325 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config() 329 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config() 331 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
|
| /Linux-v5.4/drivers/clk/meson/ |
| D | axg.h | 53 #define HHI_VIID_CLK_CNTL 0x12c macro
|
| D | meson8b.h | 24 #define HHI_VIID_CLK_CNTL 0x12c /* 0x4b offset in data sheet */ macro
|
| D | gxbb.h | 34 #define HHI_VIID_CLK_CNTL 0x12c /* 0x4b offset in data sheet */ macro
|
| D | g12a.h | 55 #define HHI_VIID_CLK_CNTL 0x12C macro
|
| D | gxbb.c | 1843 .offset = HHI_VIID_CLK_CNTL, 1939 .offset = HHI_VIID_CLK_CNTL, 2023 .offset = HHI_VIID_CLK_CNTL, 2037 .offset = HHI_VIID_CLK_CNTL, 2051 .offset = HHI_VIID_CLK_CNTL, 2065 .offset = HHI_VIID_CLK_CNTL, 2079 .offset = HHI_VIID_CLK_CNTL,
|
| D | g12a.c | 3145 .offset = HHI_VIID_CLK_CNTL, 3236 .offset = HHI_VIID_CLK_CNTL, 3320 .offset = HHI_VIID_CLK_CNTL, 3334 .offset = HHI_VIID_CLK_CNTL, 3348 .offset = HHI_VIID_CLK_CNTL, 3362 .offset = HHI_VIID_CLK_CNTL, 3376 .offset = HHI_VIID_CLK_CNTL,
|
| D | meson8b.c | 1346 .offset = HHI_VIID_CLK_CNTL,
|