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Searched refs:HHI_VID_CLK_DIV (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/meson/
Dmeson_vclk.c66 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
314 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_venci_cvbs_clock_config()
822 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
885 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
889 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
899 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
903 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
913 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
917 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
927 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
[all …]
/Linux-v5.4/drivers/clk/meson/
Daxg.h62 #define HHI_VID_CLK_DIV 0x164 macro
Dmeson8b.h31 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
Dgxbb.h44 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
Dg12a.h62 #define HHI_VID_CLK_DIV 0x164 macro
Dmeson8b.c1152 .offset = HHI_VID_CLK_DIV,
1194 .offset = HHI_VID_CLK_DIV,
1210 .offset = HHI_VID_CLK_DIV,
1240 .offset = HHI_VID_CLK_DIV,
1270 .offset = HHI_VID_CLK_DIV,
1300 .offset = HHI_VID_CLK_DIV,
1330 .offset = HHI_VID_CLK_DIV,
1521 .offset = HHI_VID_CLK_DIV,
1552 .offset = HHI_VID_CLK_DIV,
1583 .offset = HHI_VID_CLK_DIV,
Dgxbb.c1863 .offset = HHI_VID_CLK_DIV,
1891 .offset = HHI_VID_CLK_DIV,
2211 .offset = HHI_VID_CLK_DIV,
2227 .offset = HHI_VID_CLK_DIV,
Dg12a.c3160 .offset = HHI_VID_CLK_DIV,
3188 .offset = HHI_VID_CLK_DIV,
3508 .offset = HHI_VID_CLK_DIV,
3524 .offset = HHI_VID_CLK_DIV,