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Searched refs:HHI_HDMI_PLL_CNTL3 (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/meson/
Dmeson_vclk.c102 #define HHI_HDMI_PLL_CNTL3 0x328 /* 0xca offset in data sheet */ macro
248 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); in meson_venci_cvbs_clock_config()
261 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0xa6212844); in meson_venci_cvbs_clock_config()
278 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x00000000); in meson_venci_cvbs_clock_config()
466 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); in meson_hdmi_pll_set_params()
482 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4); in meson_hdmi_pll_set_params()
505 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x00000000); in meson_hdmi_pll_set_params()
553 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL3, in meson_hdmi_pll_set_params()
564 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL3, in meson_hdmi_pll_set_params()
575 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL3, in meson_hdmi_pll_set_params()
/Linux-v5.4/drivers/clk/meson/
Dgxbb.h99 #define HHI_HDMI_PLL_CNTL3 0x328 /* 0xca offset in data sheet */ macro
Dg12a.h115 #define HHI_HDMI_PLL_CNTL3 0x32c macro