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Searched refs:HHI_HDMI_CLK_CNTL (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/meson/
Dmeson_vclk.c89 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
752 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
754 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
756 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
833 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
842 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
851 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
860 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
869 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
Dmeson_dw_hdmi.c107 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 */ macro
421 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); in dw_hdmi_phy_init()
929 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); in meson_dw_hdmi_bind()
/Linux-v5.4/drivers/clk/meson/
Dmeson8b.h41 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
Dgxbb.h57 #define HHI_HDMI_CLK_CNTL 0x1CC /* 0x73 offset in data sheet */ macro
Dg12a.h73 #define HHI_HDMI_CLK_CNTL 0x1CC macro
Dgxbb.c2274 .offset = HHI_HDMI_CLK_CNTL,
2369 .offset = HHI_HDMI_CLK_CNTL,
2385 .offset = HHI_HDMI_CLK_CNTL,
2400 .offset = HHI_HDMI_CLK_CNTL,
Dmeson8b.c1614 .offset = HHI_HDMI_CLK_CNTL,
1715 .offset = HHI_HDMI_CLK_CNTL,
1734 .offset = HHI_HDMI_CLK_CNTL,
1751 .offset = HHI_HDMI_CLK_CNTL,
Dg12a.c3571 .offset = HHI_HDMI_CLK_CNTL,
3660 .offset = HHI_HDMI_CLK_CNTL,
3676 .offset = HHI_HDMI_CLK_CNTL,
3691 .offset = HHI_HDMI_CLK_CNTL,