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/Linux-v5.4/Documentation/translations/zh_CN/
Dgpio.txt27 GPIO 接口
29 本文档提供了一个在Linux下访问GPIO的公约概述。
35 什么是GPIO?
37 "通用输入/输出口"(GPIO)是一个灵活的由软件控制的数字信号。他们可
39 比较熟悉。每个GPIO 都代表一个连接到特定引脚或球栅阵列(BGA)封装中
40 “球珠”的一个位。电路板原理图显示了 GPIO 与外部硬件的连接关系。
43 片上系统 (SOC) 处理器对 GPIO 有很大的依赖。在某些情况下,每个
44 非专用引脚都可配置为 GPIO,且大多数芯片都最少有一些 GPIO。
45 可编程逻辑器件(类似 FPGA) 可以方便地提供 GPIO。像电源管理和
47 匮乏的 SOC。同时还有通过 I2C 或 SPI 串行总线连接的“GPIO扩展器”
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/Linux-v5.4/drivers/pinctrl/
Dpinctrl-xway.c116 MFP_XWAY(GPIO0, GPIO, EXIN, NONE, TDM),
117 MFP_XWAY(GPIO1, GPIO, EXIN, NONE, NONE),
118 MFP_XWAY(GPIO2, GPIO, CGU, EXIN, GPHY),
119 MFP_XWAY(GPIO3, GPIO, CGU, NONE, PCI),
120 MFP_XWAY(GPIO4, GPIO, STP, NONE, ASC),
121 MFP_XWAY(GPIO5, GPIO, STP, GPHY, NONE),
122 MFP_XWAY(GPIO6, GPIO, STP, GPT, ASC),
123 MFP_XWAY(GPIO7, GPIO, CGU, PCI, GPHY),
124 MFP_XWAY(GPIO8, GPIO, CGU, NMI, NONE),
125 MFP_XWAY(GPIO9, GPIO, ASC, SPI, EXIN),
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Dpinctrl-lpc18xx.c238 LPC_P(0,0, GPIO, SSP1, ENET, SGPIO, R, R, I2S0_TX_WS,I2S1, 0, ND);
239 LPC_P(0,1, GPIO, SSP1,ENET_ALT,SGPIO, R, R, ENET, I2S1, 0, ND);
240 LPC_P(1,0, GPIO, CTIN, EMC, R, R, SSP0, SGPIO, R, 0, ND);
241 LPC_P(1,1, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND);
242 LPC_P(1,2, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND);
243 LPC_P(1,3, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
244 LPC_P(1,4, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
245 LPC_P(1,5, GPIO, CTOUT, R, EMC, USB0, SSP1, SGPIO, SDMMC, 0, ND);
246 LPC_P(1,6, GPIO, CTIN, R, EMC, R, R, SGPIO, SDMMC, 0, ND);
247 LPC_P(1,7, GPIO, UART1, CTOUT, EMC, USB0, R, R, R, 0, ND);
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Dpinctrl-falcon.c107 MFP_FALCON(GPIO0, RST, GPIO, NONE, NONE),
108 MFP_FALCON(GPIO1, GPIO, GPIO, NONE, NONE),
109 MFP_FALCON(GPIO2, GPIO, GPIO, NONE, NONE),
110 MFP_FALCON(GPIO3, GPIO, GPIO, NONE, NONE),
111 MFP_FALCON(GPIO4, NTR, GPIO, NONE, NONE),
112 MFP_FALCON(GPIO5, NTR, GPIO, PPS, NONE),
113 MFP_FALCON(GPIO6, RST, GPIO, NONE, NONE),
114 MFP_FALCON(GPIO7, MDIO, GPIO, NONE, NONE),
115 MFP_FALCON(GPIO8, MDIO, GPIO, NONE, NONE),
116 MFP_FALCON(GPIO9, LED, GPIO, NONE, NONE),
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/Linux-v5.4/Documentation/devicetree/bindings/gpio/
Drenesas,gpio-rcar.txt1 * Renesas R-Car GPIO Controller
6 - "renesas,gpio-r8a7743": for R8A7743 (RZ/G1M) compatible GPIO controller.
7 - "renesas,gpio-r8a7744": for R8A7744 (RZ/G1N) compatible GPIO controller.
8 - "renesas,gpio-r8a7745": for R8A7745 (RZ/G1E) compatible GPIO controller.
9 - "renesas,gpio-r8a77470": for R8A77470 (RZ/G1C) compatible GPIO controller.
10 - "renesas,gpio-r8a774a1": for R8A774A1 (RZ/G2M) compatible GPIO controller.
11 - "renesas,gpio-r8a774c0": for R8A774C0 (RZ/G2E) compatible GPIO controller.
12 - "renesas,gpio-r8a7778": for R8A7778 (R-Car M1) compatible GPIO controller.
13 - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller.
14 - "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO controller.
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Dgpio.txt1 Specifying GPIO information for devices
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
38 a local offset to the GPIO line and the second cell represent consumer flags,
57 GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
83 1.1) GPIO specifier best practices
86 A gpio-specifier should contain a flag indicating the GPIO polarity; active-
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Dnxp,lpc1850-gpio.txt1 NXP LPC18xx/43xx GPIO controller Device Tree Bindings
6 - reg : List of addresses and lengths of the GPIO controller
10 - clocks : Phandle and clock specifier pair for GPIO controller
11 - resets : Phandle and reset specifier pair for GPIO controller
12 - gpio-controller : Marks the device node as a GPIO controller
14 - The first cell is the GPIO line number
19 0..9 range, for GPIO pin interrupts it is equal
21 GPIO pin configuration, 8 is for GPIO GROUP0
22 interrupt, 9 is for GPIO GROUP1 interrupt
26 - gpio-ranges : Mapping between GPIO and pinctrl
Dintel,ixp4xx-gpio.txt1 Intel IXP4xx XScale Networking Processors GPIO
3 This GPIO controller is found in the Intel IXP4xx processors.
4 It supports 16 GPIO lines.
6 The interrupt portions of the GPIO controller is hierarchical:
7 the synchronous edge detector is part of the GPIO block, but the
10 the first 12 GPIO lines to 12 system interrupts.
12 The remaining 4 GPIO lines can not be used for receiving
15 The interrupt parent of this GPIO controller must be the
23 - gpio-controller : marks this as a GPIO controller
D8xxx_gpio.txt1 GPIO controllers on MPC8xxx SoCs
3 This is for the non-QE/CPM/GUTs GPIO controllers as found on
6 Every GPIO controller node must have #gpio-cells property defined,
8 See bindings/gpio/gpio.txt for details of how to specify GPIO
11 The GPIO module usually is connected to the SoC's internal interrupt
13 interrupt client nodes section) for details how to specify this GPIO
16 The GPIO module may serve as another interrupt controller (cascaded to
28 - interrupts: Interrupt mapping for GPIO IRQ.
29 - gpio-controller: Marks the port as GPIO controller.
32 - interrupt-controller: Empty boolean property which marks the GPIO
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Dnvidia,tegra186-gpio.txt1 NVIDIA Tegra186 GPIO controllers
3 Tegra186 contains two GPIO controllers; a main controller and an "AON"
9 The Tegra186 GPIO controller allows software to set the IO direction of, and
10 read/write the value of, numerous GPIO signals. Routing of GPIO signals to
14 a) Security registers, which allow configuration of allowed access to the GPIO
17 varies between the different GPIO controllers.
20 that wishes to configure access to the GPIO registers needs access to these
21 registers to do so. Code which simply wishes to read or write GPIO data does not
24 b) GPIO registers, which allow manipulation of the GPIO signals. In some GPIO
27 documentation for rationale. Any particular GPIO client is expected to access
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Dgpio-twl4030.txt1 twl4030 GPIO controller bindings
5 - "ti,twl4030-gpio" for twl4030 GPIO controller
9 - gpio-controller : Marks the device node as a GPIO controller.
12 The first cell is the GPIO number.
15 - ti,debounce : if n-th bit is set, debounces GPIO-n
16 - ti,mmc-cd : if n-th bit is set, GPIO-n controls VMMC(n+1)
17 - ti,pullups : if n-th bit is set, set a pullup on GPIO-n
18 - ti,pulldowns : if n-th bit is set, set a pulldown on GPIO-n
Dgpio-altera.txt1 Altera GPIO controller bindings
10 - gpio-controller : Marks the device node as a GPIO controller.
13 - The first cell is the GPIO offset number within the GPIO controller.
15 - altr,interrupt-type: Specifies the interrupt trigger type the GPIO
16 hardware is synthesized. This field is required if the Altera GPIO controller
18 but hardware synthesized. Required if GPIO is used as an interrupt
27 - altr,ngpio: Width of the GPIO bank. This defines how many pins the
28 GPIO device has. Ranges between 1-32. Optional and defaults to 32 if not
/Linux-v5.4/drivers/gpio/
DKconfig3 # GPIO infrastructure and drivers
15 bool "GPIO Support"
17 This enables GPIO support through the generic GPIO library.
19 one or more of the GPIO drivers below.
51 bool "Debug GPIO calls"
54 Say Y here to add some extra checks and diagnostics to GPIO calls.
67 This ABI is deprecated. If you want to use GPIO from userspace,
82 menu "Memory mapped GPIO drivers"
86 tristate "GPIO driver for 74xx-ICs with MMIO access"
90 Say yes here to support GPIO functionality for 74xx-compatible ICs
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DTODO1 This is a place for planning the ongoing long-term work in the GPIO
5 GPIO descriptors
7 Starting with commit 79a9becda894 the GPIO subsystem embarked on a journey
8 to move away from the global GPIO numberspace and toward a decriptor-based
9 approach. This means that GPIO consumers, drivers and machine descriptions
10 ideally have no use or idea of the global GPIO numberspace that has/was
11 used in the inception of the GPIO subsystem.
15 - Convert all GPIO device drivers to only #include <linux/gpio/driver.h>
22 implicitly does not use global GPIO numbers.
33 driver infrastructure for doing simpler MMIO GPIO devices and there was
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/Linux-v5.4/drivers/pinctrl/bcm/
DKconfig18 framework. GPIO is provided by a separate GPIO driver.
21 bool "Broadcom BCM2835 GPIO (with PINCONF) driver"
29 Say Y here to enable the Broadcom BCM2835 GPIO driver.
32 bool "Broadcom iProc GPIO (with PINCONF) driver"
39 Say yes here to enable the Broadcom iProc GPIO driver.
42 same GPIO Controller IP hence this driver could be used for all.
44 The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
45 GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
46 the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
49 The Broadcom NSP has two GPIO controllers including the ChipcommonA
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/Linux-v5.4/arch/arm/boot/dts/
Dhi3620-hi4511.dts71 0x008 0x0 /* GPIO -- eFUSE_DOUT */
95 0x0f8 0x1 /* GPIO (IOMG61) */
96 0x0fc 0x1 /* GPIO (IOMG62) */
107 0x104 0x1 /* GPIO (IOMG96) */
108 0x108 0x1 /* GPIO (IOMG64) */
119 0x160 0x1 /* GPIO (IOMG85) */
120 0x164 0x1 /* GPIO (IOMG86) */
132 0x168 0x1 /* GPIO (IOMG87) */
133 0x16c 0x1 /* GPIO (IOMG88) */
134 0x170 0x1 /* GPIO (IOMG93) */
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/Linux-v5.4/arch/arm64/boot/dts/bitmain/
Dbm1880-sophon-edge.dts12 * GPIO name legend: proper name = the GPIO line is used as GPIO
15 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
29 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L"
30 * are the only ones actually used for GPIO.
62 "GPIO-A", /* GPIO0, LSEC pin 23 */
63 "GPIO-C", /* GPIO1, LSEC pin 25 */
65 "GPIO-E", /* GPIO3, LSEC pin 27 */
69 "GPIO-G", /* GPIO7, LSEC pin 29 */
118 "GPIO-I", /* GPIO50, LSEC pin 31 */
119 "GPIO-K", /* GPIO51, LSEC pin 33 */
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/Linux-v5.4/Documentation/driver-api/gpio/
Ddriver.rst2 GPIO Driver Interface
5 This document serves as a guide for writers of GPIO chip drivers.
7 Each GPIO controller driver needs to include the following header, which defines
8 the structures used to define a GPIO driver:
16 A GPIO chip handles one or more GPIO lines. To be considered a GPIO chip, the
18 line is not general purpose, it is not GPIO and should not be handled by a
19 GPIO chip. The use case is the indicative: certain lines in a system may be
20 called GPIO but serve a very particular purpose thus not meeting the criteria
22 GPIO and should therefore still be handled by a GPIO chip driver.
24 Inside a GPIO driver, individual GPIO lines are identified by their hardware
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Dlegacy.rst2 Legacy GPIO Interfaces
5 This provides an overview of GPIO access conventions on Linux.
11 What is a GPIO?
13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
15 to Linux developers working with embedded and custom hardware. Each GPIO
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
26 also "GPIO Expander" chips that connect using the I2C or SPI serial busses.
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
39 cases (to support bidirectional signaling). GPIO controllers may have
46 - Usually a GPIO will be configurable as either input or output, as needed
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Ddrivers-on-gpio.rst2 Subsystem drivers using GPIO
5 Note that standard kernel drivers exist for common GPIO tasks and will provide
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
14 i.e. a LED will turn on/off in response to a GPIO line going high or low
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
21 GPIO line cannot generate interrupts, so it needs to be periodically polled
26 mouse cable and connect the wires to GPIO lines or solder a mouse connector
30 an external speaker connected to a GPIO line.
34 HDMI connector. It will provide a better userspace sysfs interface than GPIO.
37 the system by pulling a GPIO line and will register a restart handler so
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/Linux-v5.4/Documentation/devicetree/bindings/input/
Dgpio-mouse.txt1 Device-Tree bindings for GPIO attached mice
3 This simply uses standard GPIO handles to define a simple mouse connected
4 to 5-7 GPIO lines.
9 - up-gpios: GPIO line phandle to the line indicating "up"
10 - down-gpios: GPIO line phandle to the line indicating "down"
11 - left-gpios: GPIO line phandle to the line indicating "left"
12 - right-gpios: GPIO line phandle to the line indicating "right"
15 - button-left-gpios: GPIO line handle to the left mouse button
16 - button-middle-gpios: GPIO line handle to the middle mouse button
17 - button-right-gpios: GPIO line handle to the right mouse button
/Linux-v5.4/Documentation/devicetree/bindings/pinctrl/
Dingenic,pinctrl.txt7 For the XBurst SoCs, pin control is tightly bound with GPIO ports. All pins may
9 GPIO port configuration registers and it is typical to refer to pins using the
10 naming scheme "PxN" where x is a character identifying the GPIO port with
12 pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
13 PB31 is the last pin in GPIO port B. The jz4740 and the x1000 contains 4 GPIO
15 contains 6 GPIO ports, PA to PF, for a total of 192 pins.
34 Required properties for sub-nodes (GPIO chips):
43 - reg: The GPIO bank number.
48 - gpio-controller: Marks the device node as a GPIO controller.
49 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
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/Linux-v5.4/Documentation/devicetree/bindings/serial/
Dserial.txt8 - cts-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be
10 - dcd-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be
12 - dsr-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be
14 - dtr-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be
16 - rng-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be
18 - rts-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be
/Linux-v5.4/arch/arm64/boot/dts/hisilicon/
Dhi3798cv200-poplar.dts108 gpio-line-names = "GPIO-E", "",
110 "", "GPIO-F",
111 "", "GPIO-J";
116 gpio-line-names = "GPIO-H", "GPIO-I",
117 "GPIO-L", "GPIO-G",
118 "GPIO-K", "",
126 "GPIO-C", "",
127 "", "GPIO-B";
134 "", "GPIO-D",
142 "", "GPIO-A",
/Linux-v5.4/arch/arm64/boot/dts/actions/
Ds900-bubblegum-96.dts47 * GPIO name legend: proper name = the GPIO line is used as GPIO
50 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
67 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L"
68 * are the only ones actually used for GPIO.
73 "GPIO-A", /* GPIO_0, LSEC pin 23 */
74 "GPIO-B", /* GPIO_1, LSEC pin 24 */
75 "GPIO-C", /* GPIO_2, LSEC pin 25 */
76 "GPIO-D", /* GPIO_3, LSEC pin 26 */
77 "GPIO-E", /* GPIO_4, LSEC pin 27 */
78 "GPIO-F", /* GPIO_5, LSEC pin 28 */
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