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Searched refs:GENMO_WT__VGA_HSYNC_POL_MASK (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7167 #define GENMO_WT__VGA_HSYNC_POL_MASK 0x00000040L macro
Ddce_8_0_sh_mask.h10613 #define GENMO_WT__VGA_HSYNC_POL_MASK 0x40 macro
Ddce_10_0_sh_mask.h10997 #define GENMO_WT__VGA_HSYNC_POL_MASK 0x40 macro
Ddce_11_0_sh_mask.h10809 #define GENMO_WT__VGA_HSYNC_POL_MASK 0x40 macro
Ddce_11_2_sh_mask.h12063 #define GENMO_WT__VGA_HSYNC_POL_MASK 0x40 macro
Ddce_12_0_sh_mask.h2213 #define GENMO_WT__VGA_HSYNC_POL_MASK … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_sh_mask.h852 #define GENMO_WT__VGA_HSYNC_POL_MASK … macro
Ddcn_2_0_0_sh_mask.h263 #define GENMO_WT__VGA_HSYNC_POL_MASK … macro