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Searched refs:GENMASK_ULL (Results 1 – 25 of 113) sorted by relevance

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/Linux-v5.4/drivers/platform/mellanox/
Dmlxbf-tmfifo-regs.h18 #define MLXBF_TMFIFO_TX_STS__COUNT_RMASK GENMASK_ULL(8, 0)
19 #define MLXBF_TMFIFO_TX_STS__COUNT_MASK GENMASK_ULL(8, 0)
25 #define MLXBF_TMFIFO_TX_CTL__LWM_RMASK GENMASK_ULL(7, 0)
26 #define MLXBF_TMFIFO_TX_CTL__LWM_MASK GENMASK_ULL(7, 0)
30 #define MLXBF_TMFIFO_TX_CTL__HWM_RMASK GENMASK_ULL(7, 0)
31 #define MLXBF_TMFIFO_TX_CTL__HWM_MASK GENMASK_ULL(15, 8)
35 #define MLXBF_TMFIFO_TX_CTL__MAX_ENTRIES_RMASK GENMASK_ULL(8, 0)
36 #define MLXBF_TMFIFO_TX_CTL__MAX_ENTRIES_MASK GENMASK_ULL(40, 32)
43 #define MLXBF_TMFIFO_RX_STS__COUNT_RMASK GENMASK_ULL(8, 0)
44 #define MLXBF_TMFIFO_RX_STS__COUNT_MASK GENMASK_ULL(8, 0)
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/Linux-v5.4/drivers/mmc/host/
Dcavium.h121 #define MIO_EMM_DMA_FIFO_CFG_INT_LVL GENMASK_ULL(12, 8)
122 #define MIO_EMM_DMA_FIFO_CFG_COUNT GENMASK_ULL(4, 0)
130 #define MIO_EMM_DMA_FIFO_CMD_SIZE GENMASK_ULL(55, 36)
133 #define MIO_EMM_CMD_BUS_ID GENMASK_ULL(61, 60)
136 #define MIO_EMM_CMD_OFFSET GENMASK_ULL(54, 49)
137 #define MIO_EMM_CMD_CTYPE_XOR GENMASK_ULL(42, 41)
138 #define MIO_EMM_CMD_RTYPE_XOR GENMASK_ULL(40, 38)
139 #define MIO_EMM_CMD_IDX GENMASK_ULL(37, 32)
140 #define MIO_EMM_CMD_ARG GENMASK_ULL(31, 0)
143 #define MIO_EMM_DMA_BUS_ID GENMASK_ULL(61, 60)
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/Linux-v5.4/drivers/net/ethernet/marvell/octeontx2/af/
Dcgx_fw_if.h122 #define EVTREG_ID GENMASK_ULL(8, 3)
129 #define EVTREG_ERRTYPE GENMASK_ULL(18, 9)
134 #define RESP_MAJOR_VER GENMASK_ULL(12, 9)
135 #define RESP_MINOR_VER GENMASK_ULL(16, 13)
140 #define RESP_MAC_ADDR GENMASK_ULL(56, 9)
145 #define RESP_MKEX_PRFL_SIZE GENMASK_ULL(63, 9)
150 #define RESP_MKEX_PRFL_ADDR GENMASK_ULL(63, 9)
171 #define RESP_LINKSTAT_UP GENMASK_ULL(9, 9)
172 #define RESP_LINKSTAT_FDUPLEX GENMASK_ULL(10, 10)
173 #define RESP_LINKSTAT_SPEED GENMASK_ULL(14, 11)
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Dnpc.h264 #define VTAG0_TYPE_MASK GENMASK_ULL(14, 12)
265 #define VTAG0_LID_MASK GENMASK_ULL(10, 8)
266 #define VTAG0_RELPTR_MASK GENMASK_ULL(7, 0)
/Linux-v5.4/drivers/fpga/
Ddfl.h68 #define DFH_ID GENMASK_ULL(11, 0) /* Feature ID */
71 #define DFH_REVISION GENMASK_ULL(15, 12) /* Feature revision */
72 #define DFH_NEXT_HDR_OFST GENMASK_ULL(39, 16) /* Offset to next DFH */
74 #define DFH_TYPE GENMASK_ULL(63, 60) /* Feature type */
80 #define NEXT_AFU_NEXT_DFH_OFST GENMASK_ULL(23, 0) /* Offset to next AFU */
93 #define FME_CAP_FABRIC_VERID GENMASK_ULL(7, 0) /* Fabric version ID */
99 #define FME_CAP_NUM_PORTS GENMASK_ULL(19, 17) /* Number of ports */
100 #define FME_CAP_ADDR_WIDTH GENMASK_ULL(29, 24) /* Address bus width */
101 #define FME_CAP_CACHE_SIZE GENMASK_ULL(43, 32) /* cache size in KB */
102 #define FME_CAP_CACHE_ASSOC GENMASK_ULL(47, 44) /* Associativity */
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Ddfl-fme-mgr.c39 #define FME_PR_CTRL_PR_RGN_ID GENMASK_ULL(9, 7) /* PR Region ID */
45 #define FME_PR_STS_PR_CREDIT GENMASK_ULL(8, 0)
48 #define FME_PR_STS_PR_CTRLR_STS GENMASK_ULL(22, 20) /* Controller status */
49 #define FME_PR_STS_PR_HOST_STS GENMASK_ULL(27, 24) /* PR host status */
53 #define FME_PR_DATA_PR_DATA_RAW GENMASK_ULL(32, 0)
Ddfl-fme-error.c37 #define INJECT_ERROR_MASK GENMASK_ULL(2, 0)
39 #define ERROR_MASK GENMASK_ULL(63, 0)
72 writeq(GENMASK_ULL(63, 0), base + PCIE0_ERROR_MASK); in pcie0_errors_store()
117 writeq(GENMASK_ULL(63, 0), base + PCIE1_ERROR_MASK); in pcie1_errors_store()
231 writeq(GENMASK_ULL(63, 0), base + FME_ERROR_MASK); in fme_errors_store()
/Linux-v5.4/virt/kvm/arm/vgic/
Dvgic.h72 #define KVM_ITS_CTE_ICID_MASK GENMASK_ULL(15, 0)
75 #define KVM_ITS_ITE_PINTID_MASK GENMASK_ULL(47, 16)
76 #define KVM_ITS_ITE_ICID_MASK GENMASK_ULL(15, 0)
80 #define KVM_ITS_DTE_NEXT_MASK GENMASK_ULL(62, 49)
82 #define KVM_ITS_DTE_ITTADDR_MASK GENMASK_ULL(48, 5)
83 #define KVM_ITS_DTE_SIZE_MASK GENMASK_ULL(4, 0)
86 #define KVM_ITS_L1E_ADDR_MASK GENMASK_ULL(51, 16)
88 #define KVM_VGIC_V3_RDIST_INDEX_MASK GENMASK_ULL(11, 0)
89 #define KVM_VGIC_V3_RDIST_FLAGS_MASK GENMASK_ULL(15, 12)
91 #define KVM_VGIC_V3_RDIST_BASE_MASK GENMASK_ULL(51, 16)
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Dvgic-mmio-v3.c23 return (data >> (offset * 8)) & GENMASK_ULL(num * 8 - 1, 0); in extract_bytes()
33 reg &= ~GENMASK_ULL(upper, lower); in update_64bit_reg()
34 val &= GENMASK_ULL(len * 8 - 1, 0); in update_64bit_reg()
346 (GENMASK_ULL(63, 59) | GENMASK_ULL(55, 52) | GENMASK_ULL(6, 5))
348 (BIT_ULL(63) | GENMASK_ULL(61, 59) | GENMASK_ULL(55, 52) | \
349 GENMASK_ULL(15, 12) | GENMASK_ULL(6, 0))
/Linux-v5.4/drivers/firmware/efi/
Dcper-x86.c12 #define VALID_PROC_ERR_INFO_NUM(bits) (((bits) & GENMASK_ULL(7, 2)) >> 2)
13 #define VALID_PROC_CXT_INFO_NUM(bits) (((bits) & GENMASK_ULL(13, 8)) >> 8)
47 #define CHECK_VALID_BITS(check) (((check) & GENMASK_ULL(15, 0)))
48 #define CHECK_TRANS_TYPE(check) (((check) & GENMASK_ULL(17, 16)) >> 16)
49 #define CHECK_OPERATION(check) (((check) & GENMASK_ULL(21, 18)) >> 18)
50 #define CHECK_LEVEL(check) (((check) & GENMASK_ULL(24, 22)) >> 22)
57 #define CHECK_BUS_PART_TYPE(check) (((check) & GENMASK_ULL(31, 30)) >> 30)
59 #define CHECK_BUS_ADDR_SPACE(check) (((check) & GENMASK_ULL(34, 33)) >> 33)
68 #define CHECK_MS_ERR_TYPE(check) (((check) & GENMASK_ULL(18, 16)) >> 16)
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_debugfs.c122 se_bank = (*pos & GENMASK_ULL(33, 24)) >> 24; in amdgpu_debugfs_process_reg_op()
123 sh_bank = (*pos & GENMASK_ULL(43, 34)) >> 34; in amdgpu_debugfs_process_reg_op()
124 instance_bank = (*pos & GENMASK_ULL(53, 44)) >> 44; in amdgpu_debugfs_process_reg_op()
135 me = (*pos & GENMASK_ULL(33, 24)) >> 24; in amdgpu_debugfs_process_reg_op()
136 pipe = (*pos & GENMASK_ULL(43, 34)) >> 34; in amdgpu_debugfs_process_reg_op()
137 queue = (*pos & GENMASK_ULL(53, 44)) >> 44; in amdgpu_debugfs_process_reg_op()
138 vmid = (*pos & GENMASK_ULL(58, 54)) >> 54; in amdgpu_debugfs_process_reg_op()
629 offset = (*pos & GENMASK_ULL(6, 0)); in amdgpu_debugfs_wave_read()
630 se = (*pos & GENMASK_ULL(14, 7)) >> 7; in amdgpu_debugfs_wave_read()
631 sh = (*pos & GENMASK_ULL(22, 15)) >> 15; in amdgpu_debugfs_wave_read()
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/Linux-v5.4/drivers/iommu/
Darm-smmu-v3.c145 #define STRTAB_BASE_ADDR_MASK GENMASK_ULL(51, 6)
173 #define MSI_CFG0_ADDR_MASK GENMASK_ULL(51, 2)
193 #define Q_BASE_ADDR_MASK GENMASK_ULL(51, 5)
214 #define STRTAB_L1_DESC_SPAN GENMASK_ULL(4, 0)
215 #define STRTAB_L1_DESC_L2PTR_MASK GENMASK_ULL(51, 6)
219 #define STRTAB_STE_0_CFG GENMASK_ULL(3, 1)
225 #define STRTAB_STE_0_S1FMT GENMASK_ULL(5, 4)
227 #define STRTAB_STE_0_S1CTXPTR_MASK GENMASK_ULL(51, 6)
228 #define STRTAB_STE_0_S1CDMAX GENMASK_ULL(63, 59)
234 #define STRTAB_STE_1_S1CIR GENMASK_ULL(3, 2)
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/Linux-v5.4/include/linux/i3c/
Ddevice.h79 #define I3C_PID_MANUF_ID(pid) (((pid) & GENMASK_ULL(47, 33)) >> 33)
81 #define I3C_PID_RND_VAL(pid) ((pid) & GENMASK_ULL(31, 0))
82 #define I3C_PID_PART_ID(pid) (((pid) & GENMASK_ULL(31, 16)) >> 16)
83 #define I3C_PID_INSTANCE_ID(pid) (((pid) & GENMASK_ULL(15, 12)) >> 12)
84 #define I3C_PID_EXTRA_INFO(pid) ((pid) & GENMASK_ULL(11, 0))
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_buddy.h13 #define I915_BUDDY_HEADER_OFFSET GENMASK_ULL(63, 12)
14 #define I915_BUDDY_HEADER_STATE GENMASK_ULL(11, 10)
18 #define I915_BUDDY_HEADER_ORDER GENMASK_ULL(9, 0)
/Linux-v5.4/drivers/net/ethernet/netronome/nfp/nfpcore/
Dnfp_nsp_eth.c24 #define NSP_ETH_PORT_LANES GENMASK_ULL(3, 0)
25 #define NSP_ETH_PORT_INDEX GENMASK_ULL(15, 8)
26 #define NSP_ETH_PORT_LABEL GENMASK_ULL(53, 48)
27 #define NSP_ETH_PORT_PHYLABEL GENMASK_ULL(59, 54)
37 #define NSP_ETH_STATE_RATE GENMASK_ULL(11, 8)
38 #define NSP_ETH_STATE_INTERFACE GENMASK_ULL(19, 12)
39 #define NSP_ETH_STATE_MEDIA GENMASK_ULL(21, 20)
41 #define NSP_ETH_STATE_ANEG GENMASK_ULL(25, 23)
42 #define NSP_ETH_STATE_FEC GENMASK_ULL(27, 26)
Dnfp_nsp.c31 #define NSP_STATUS_MAGIC GENMASK_ULL(63, 48)
32 #define NSP_STATUS_MAJOR GENMASK_ULL(47, 44)
33 #define NSP_STATUS_MINOR GENMASK_ULL(43, 32)
34 #define NSP_STATUS_CODE GENMASK_ULL(31, 16)
35 #define NSP_STATUS_RESULT GENMASK_ULL(15, 8)
39 #define NSP_COMMAND_OPTION GENMASK_ULL(63, 32)
40 #define NSP_COMMAND_CODE GENMASK_ULL(31, 16)
46 #define NSP_BUFFER_CPP GENMASK_ULL(63, 40)
47 #define NSP_BUFFER_ADDRESS GENMASK_ULL(39, 0)
50 #define NSP_DFLT_BUFFER_CPP GENMASK_ULL(63, 40)
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Dnfp_target.c463 *addr &= ~GENMASK_ULL(idx_lsb, iid_lsb); in nfp_encode_basic_search()
501 v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb); in nfp_encode_basic()
590 v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb); in nfp_encode_mu()
597 v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb); in nfp_encode_mu()
618 v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb); in nfp_encode_mu()
653 v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb); in nfp_encode_mu()
693 *addr &= ~GENMASK_ULL(29, 24); in nfp_cppat_addr_encode()
694 *addr |= ((u64)dest_island << 24) & GENMASK_ULL(29, 24); in nfp_cppat_addr_encode()
/Linux-v5.4/arch/mips/include/asm/
Dmips-cm.h132 #define CM_GCR_CONFIG_CLUSTER_ID GENMASK_ULL(39, 32)
139 #define CM_GCR_BASE_GCRBASE GENMASK_ULL(47, 15)
175 #define CM3_GCR_ERROR_CAUSE_ERRTYPE GENMASK_ULL(63, 58)
276 #define CM_GCR_L2SM_TAG_ADDR_COP_NUM_LINES GENMASK_ULL(63, 48)
277 #define CM_GCR_L2SM_TAG_ADDR_COP_START_TAG GENMASK_ULL(47, 6)
/Linux-v5.4/arch/x86/kernel/acpi/
Dcppc_msr.c23 u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1, in cpc_read_ffh()
39 u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1, in cpc_write_ffh()
/Linux-v5.4/lib/
Dpacking.c57 *box_mask = GENMASK_ULL(new_box_start_bit, new_box_end_bit); in adjust_for_msb_right_quirk()
161 proj_mask = GENMASK_ULL(proj_start_bit, proj_end_bit); in packing()
162 box_mask = GENMASK_ULL(box_start_bit, box_end_bit); in packing()
/Linux-v5.4/arch/x86/include/asm/
Dvmx.h122 return vmx_basic & GENMASK_ULL(30, 0); in vmx_basic_vmcs_revision_id()
127 return (vmx_basic & GENMASK_ULL(44, 32)) >> 32; in vmx_basic_vmcs_size()
137 return (vmx_misc & GENMASK_ULL(24, 16)) >> 16; in vmx_misc_cr3_count()
142 return (vmx_misc & GENMASK_ULL(27, 25)) >> 25; in vmx_misc_max_msr()
147 return (vmx_misc & GENMASK_ULL(63, 32)) >> 32; in vmx_misc_mseg_revid()
/Linux-v5.4/arch/arm64/kvm/
Dva_layout.c57 va_mask = GENMASK_ULL(tag_lsb - 1, 0); in compute_layout()
58 tag_val = get_random_long() & GENMASK_ULL(vabits_actual - 2, tag_lsb); in compute_layout()
170 addr |= ((u64)origptr & GENMASK_ULL(10, 7)); in kvm_patch_vector_branch()
/Linux-v5.4/include/linux/irqchip/
Darm-gic-v3.h164 #define GIC_ENCODE_SZ(n, w) (((unsigned long)(n) - 1) & GENMASK_ULL(((w) - 1), 0))
190 #define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12))
191 #define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16))
375 #define GITS_CBASER_ADDRESS(cbaser) ((cbaser) & GENMASK_ULL(51, 12))
405 #define GITS_BASER_ENTRY_SIZE_MASK GENMASK_ULL(52, 48)
407 (((phys) & GENMASK_ULL(47, 16)) | (((phys) >> 48) & 0xf) << 12)
409 (((baser) & GENMASK_ULL(47, 16)) | (((baser) >> 12) & 0xf) << 48)
/Linux-v5.4/drivers/firmware/
Dstratix10-rsu.c19 #define RSU_STATE_MASK GENMASK_ULL(31, 0)
20 #define RSU_VERSION_MASK GENMASK_ULL(63, 32)
21 #define RSU_ERROR_LOCATION_MASK GENMASK_ULL(31, 0)
22 #define RSU_ERROR_DETAIL_MASK GENMASK_ULL(63, 32)
23 #define RSU_FW_VERSION_MASK GENMASK_ULL(15, 0)
/Linux-v5.4/drivers/edac/
Damd64_edac.c400 base_bits = GENMASK_ULL(31, 21) | GENMASK_ULL(15, 9); in get_cs_base_and_mask()
401 mask_bits = GENMASK_ULL(29, 21) | GENMASK_ULL(15, 9); in get_cs_base_and_mask()
413 *base = (csbase & GENMASK_ULL(15, 5)) << 6; in get_cs_base_and_mask()
414 *base |= (csbase & GENMASK_ULL(30, 19)) << 8; in get_cs_base_and_mask()
418 *mask &= ~((GENMASK_ULL(15, 5) << 6) | in get_cs_base_and_mask()
419 (GENMASK_ULL(30, 19) << 8)); in get_cs_base_and_mask()
421 *mask |= (csmask & GENMASK_ULL(15, 5)) << 6; in get_cs_base_and_mask()
422 *mask |= (csmask & GENMASK_ULL(30, 19)) << 8; in get_cs_base_and_mask()
432 GENMASK_ULL(30,19) | GENMASK_ULL(13,5); in get_cs_base_and_mask()
435 GENMASK_ULL(28,19) | GENMASK_ULL(13,5); in get_cs_base_and_mask()
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