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Searched refs:GENFC_RD__VSYNC_SEL_R_MASK (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7145 #define GENFC_RD__VSYNC_SEL_R_MASK 0x00000008L macro
Ddce_8_0_sh_mask.h10633 #define GENFC_RD__VSYNC_SEL_R_MASK 0x8 macro
Ddce_10_0_sh_mask.h11017 #define GENFC_RD__VSYNC_SEL_R_MASK 0x8 macro
Ddce_11_0_sh_mask.h10829 #define GENFC_RD__VSYNC_SEL_R_MASK 0x8 macro
Ddce_11_2_sh_mask.h12083 #define GENFC_RD__VSYNC_SEL_R_MASK 0x8 macro
Ddce_12_0_sh_mask.h2243 #define GENFC_RD__VSYNC_SEL_R_MASK … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_sh_mask.h882 #define GENFC_RD__VSYNC_SEL_R_MASK … macro
Ddcn_2_0_0_sh_mask.h293 #define GENFC_RD__VSYNC_SEL_R_MASK … macro