Searched refs:G4X_WM_LEVEL_SR (Results 1 – 2 of 2) sorted by relevance
1063 dev_priv->wm.pri_latency[G4X_WM_LEVEL_SR] = 12; in g4x_setup_wm_latency()1101 case G4X_WM_LEVEL_SR: in g4x_fbc_fifo_size()1198 level = max(level, G4X_WM_LEVEL_SR); in g4x_raw_fbc_wm_set()1273 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], in g4x_raw_plane_wm_compute()1278 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, in g4x_raw_plane_wm_compute()1317 if (level <= G4X_WM_LEVEL_SR) { in g4x_invalidate_wms()1370 level = G4X_WM_LEVEL_SR; in g4x_compute_pipe_wm()1411 if (level >= G4X_WM_LEVEL_SR && in g4x_compute_pipe_wm()1412 wm_state->sr.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_SR)) in g4x_compute_pipe_wm()1471 g4x_plane_fifo_size(PLANE_PRIMARY, G4X_WM_LEVEL_SR) || in g4x_compute_intermediate_wm()[all …]
666 G4X_WM_LEVEL_SR, enumerator
