Searched refs:FW_BLC_SELF (Results 1 – 5 of 5) sorted by relevance
469 if (REG_READ(FW_BLC_SELF) & FW_BLC_SELF_EN) { in cdv_disable_sr()472 REG_WRITE(FW_BLC_SELF, (REG_READ(FW_BLC_SELF) & ~FW_BLC_SELF_EN)); in cdv_disable_sr()473 REG_READ(FW_BLC_SELF); in cdv_disable_sr()532 REG_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN); in cdv_update_wm()533 REG_READ(FW_BLC_SELF); in cdv_update_wm()
598 #define FW_BLC_SELF 0x20e0 macro
380 was_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in _intel_set_memory_cxsr()381 I915_WRITE(FW_BLC_SELF, enable ? FW_BLC_SELF_EN : 0); in _intel_set_memory_cxsr()382 POSTING_READ(FW_BLC_SELF); in _intel_set_memory_cxsr()393 was_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in _intel_set_memory_cxsr()396 I915_WRITE(FW_BLC_SELF, val); in _intel_set_memory_cxsr()397 POSTING_READ(FW_BLC_SELF); in _intel_set_memory_cxsr()2401 I915_WRITE(FW_BLC_SELF, in i9xx_update_wm()2404 I915_WRITE(FW_BLC_SELF, srwm & 0x3f); in i9xx_update_wm()5993 wm->cxsr = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in g4x_wm_get_hw_state()
1424 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in i915_sr_status()
2755 #define FW_BLC_SELF _MMIO(0x20e0) /* 915+ only */ macro
