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Searched refs:FLD_MOD (Results 1 – 24 of 24) sorted by relevance

/Linux-v5.4/drivers/video/fbdev/omap2/omapfb/dss/
Dpll.c248 l = FLD_MOD(l, 1, 0, 0); /* PLL_STOPMODE */ in dss_pll_write_config_type_a()
249 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
250 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
252 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
255 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
261 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
264 l = FLD_MOD(l, cinfo->mX[3] ? cinfo->mX[3] - 1 : 0, in dss_pll_write_config_type_a()
276 l = FLD_MOD(l, f, 4, 1); /* PLL_FREQSEL */ in dss_pll_write_config_type_a()
280 l = FLD_MOD(l, f, 3, 1); /* PLL_SELFREQDCO */ in dss_pll_write_config_type_a()
282 l = FLD_MOD(l, 1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_a()
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Dhdmi_wp.c155 r = FLD_MOD(r, vsync_pol, 7, 7); in hdmi_wp_video_config_interface()
156 r = FLD_MOD(r, hsync_pol, 6, 6); in hdmi_wp_video_config_interface()
157 r = FLD_MOD(r, timings->interlace, 3, 3); in hdmi_wp_video_config_interface()
158 r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */ in hdmi_wp_video_config_interface()
214 r = FLD_MOD(r, aud_fmt->stereo_channels, 26, 24); in hdmi_wp_audio_config_format()
215 r = FLD_MOD(r, aud_fmt->active_chnnls_msk, 23, 16); in hdmi_wp_audio_config_format()
217 r = FLD_MOD(r, aud_fmt->en_sig_blk_strt_end, 5, 5); in hdmi_wp_audio_config_format()
218 r = FLD_MOD(r, aud_fmt->type, 4, 4); in hdmi_wp_audio_config_format()
219 r = FLD_MOD(r, aud_fmt->justification, 3, 3); in hdmi_wp_audio_config_format()
220 r = FLD_MOD(r, aud_fmt->sample_order, 2, 2); in hdmi_wp_audio_config_format()
[all …]
Dhdmi4_core.c228 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_VEN_FOLLOWVSYNC, 5, 5); in hdmi_core_video_config()
229 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_HEN_FOLLOWHSYNC, 4, 4); in hdmi_core_video_config()
230 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_BSEL_24BITBUS, 2, 2); in hdmi_core_video_config()
231 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_EDGE_RISINGEDGE, 1, 1); in hdmi_core_video_config()
242 r = FLD_MOD(r, cfg->op_dither_truc - 3, 7, 6); in hdmi_core_video_config()
243 r = FLD_MOD(r, 1, 5, 5); in hdmi_core_video_config()
245 r = FLD_MOD(r, cfg->op_dither_truc, 7, 6); in hdmi_core_video_config()
246 r = FLD_MOD(r, 0, 5, 5); in hdmi_core_video_config()
252 r = FLD_MOD(r, cfg->deep_color_pkt, 6, 6); in hdmi_core_video_config()
253 r = FLD_MOD(r, cfg->pkt_mode, 5, 3); in hdmi_core_video_config()
[all …]
Ddsi.c114 dsi_write_reg(dsidev, idx, FLD_MOD(dsi_read_reg(dsidev, idx), val, start, end))
1829 r = FLD_MOD(r, lane_number + 1, offset + 2, offset); in dsi_set_lane_config()
1830 r = FLD_MOD(r, polarity, offset + 3, offset + 3); in dsi_set_lane_config()
1837 r = FLD_MOD(r, 0, offset + 2, offset); in dsi_set_lane_config()
1838 r = FLD_MOD(r, 0, offset + 3, offset + 3); in dsi_set_lane_config()
1916 r = FLD_MOD(r, ths_prepare, 31, 24); in dsi_cio_timings()
1917 r = FLD_MOD(r, ths_prepare_ths_zero, 23, 16); in dsi_cio_timings()
1918 r = FLD_MOD(r, ths_trail, 15, 8); in dsi_cio_timings()
1919 r = FLD_MOD(r, ths_exit, 7, 0); in dsi_cio_timings()
1923 r = FLD_MOD(r, tlpx_half, 20, 16); in dsi_cio_timings()
[all …]
Ddss.c59 dss_write_reg(idx, FLD_MOD(dss_read_reg(idx), val, start, end))
266 l = FLD_MOD(l, 0xf, 19, 15); /* SDI_PDIV */ in dss_sdi_init()
267 l = FLD_MOD(l, datapairs-1, 3, 2); /* SDI_PRSEL */ in dss_sdi_init()
268 l = FLD_MOD(l, 2, 1, 0); /* SDI_BWSEL */ in dss_sdi_init()
272 l = FLD_MOD(l, 0x7, 25, 22); /* SDI_PLL_FREQSEL */ in dss_sdi_init()
273 l = FLD_MOD(l, 0xb, 16, 11); /* SDI_PLL_REGN */ in dss_sdi_init()
274 l = FLD_MOD(l, 0xb4, 10, 1); /* SDI_PLL_REGM */ in dss_sdi_init()
Dhdmi5_core.c320 r = FLD_MOD(r, vsync_pol, 6, 6); in hdmi_core_video_config()
321 r = FLD_MOD(r, hsync_pol, 5, 5); in hdmi_core_video_config()
322 r = FLD_MOD(r, cfg->data_enable_pol, 4, 4); in hdmi_core_video_config()
323 r = FLD_MOD(r, cfg->vblank_osc, 1, 1); in hdmi_core_video_config()
324 r = FLD_MOD(r, cfg->v_fc_config.timings.interlace, 0, 0); in hdmi_core_video_config()
Ddispc.c52 dispc_write_reg(idx, FLD_MOD(dispc_read_reg(idx), val, start, end))
982 val = FLD_MOD(val, chan, shift, shift); in dispc_ovl_set_channel_out()
983 val = FLD_MOD(val, chan2, 31, 30); in dispc_ovl_set_channel_out()
985 val = FLD_MOD(val, channel, shift, shift); in dispc_ovl_set_channel_out()
1116 val = FLD_MOD(val, enable, 9, 9); in dispc_ovl_set_vid_color_conv()
1180 v = FLD_MOD(v, 4, 2, 0); /* GFX BUF top to WB */ in dispc_init_fifos()
1181 v = FLD_MOD(v, 4, 5, 3); /* GFX BUF bottom to WB */ in dispc_init_fifos()
1182 v = FLD_MOD(v, 0, 26, 24); /* WB BUF top to GFX */ in dispc_init_fifos()
1183 v = FLD_MOD(v, 0, 29, 27); /* WB BUF bottom to GFX */ in dispc_init_fifos()
2852 l = FLD_MOD(l, truncation, 10, 10); /* TRUNCATIONENABLE */ in dispc_wb_setup()
[all …]
Dvideo-pll.c28 writel_relaxed(FLD_MOD(readl_relaxed(reg), val, start, end), reg)
Dhdmi5.c89 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ in hdmi_irq_handler()
90 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ in hdmi_irq_handler()
Dhdmi.h259 hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
Ddss.h62 #define FLD_MOD(orig, val, start, end) \ macro
/Linux-v5.4/drivers/gpu/drm/omapdrm/dss/
Dpll.c400 l = FLD_MOD(l, 1, 0, 0); /* PLL_STOPMODE */ in dss_pll_write_config_type_a()
401 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
402 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
404 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
407 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
413 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
416 l = FLD_MOD(l, cinfo->mX[3] ? cinfo->mX[3] - 1 : 0, in dss_pll_write_config_type_a()
428 l = FLD_MOD(l, f, 4, 1); /* PLL_FREQSEL */ in dss_pll_write_config_type_a()
432 l = FLD_MOD(l, f, 3, 1); /* PLL_SELFREQDCO */ in dss_pll_write_config_type_a()
434 l = FLD_MOD(l, 1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_a()
[all …]
Dhdmi_wp.c154 r = FLD_MOD(r, 1, 7, 7); /* VSYNC_POL to dispc active high */ in hdmi_wp_video_config_interface()
155 r = FLD_MOD(r, 1, 6, 6); /* HSYNC_POL to dispc active high */ in hdmi_wp_video_config_interface()
156 r = FLD_MOD(r, vsync_inv, 5, 5); /* CORE_VSYNC_INV */ in hdmi_wp_video_config_interface()
157 r = FLD_MOD(r, hsync_inv, 4, 4); /* CORE_HSYNC_INV */ in hdmi_wp_video_config_interface()
158 r = FLD_MOD(r, !!(vm->flags & DISPLAY_FLAGS_INTERLACED), 3, 3); in hdmi_wp_video_config_interface()
159 r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */ in hdmi_wp_video_config_interface()
234 r = FLD_MOD(r, aud_fmt->stereo_channels, 26, 24); in hdmi_wp_audio_config_format()
235 r = FLD_MOD(r, aud_fmt->active_chnnls_msk, 23, 16); in hdmi_wp_audio_config_format()
237 r = FLD_MOD(r, aud_fmt->en_sig_blk_strt_end, 5, 5); in hdmi_wp_audio_config_format()
238 r = FLD_MOD(r, aud_fmt->type, 4, 4); in hdmi_wp_audio_config_format()
[all …]
Dhdmi4_core.c227 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_VEN_FOLLOWVSYNC, 5, 5); in hdmi_core_video_config()
228 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_HEN_FOLLOWHSYNC, 4, 4); in hdmi_core_video_config()
229 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_BSEL_24BITBUS, 2, 2); in hdmi_core_video_config()
230 r = FLD_MOD(r, HDMI_CORE_SYS_SYS_CTRL1_EDGE_RISINGEDGE, 1, 1); in hdmi_core_video_config()
241 r = FLD_MOD(r, cfg->op_dither_truc - 3, 7, 6); in hdmi_core_video_config()
242 r = FLD_MOD(r, 1, 5, 5); in hdmi_core_video_config()
244 r = FLD_MOD(r, cfg->op_dither_truc, 7, 6); in hdmi_core_video_config()
245 r = FLD_MOD(r, 0, 5, 5); in hdmi_core_video_config()
251 r = FLD_MOD(r, cfg->deep_color_pkt, 6, 6); in hdmi_core_video_config()
252 r = FLD_MOD(r, cfg->pkt_mode, 5, 3); in hdmi_core_video_config()
[all …]
Ddsi.c115 dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, end))
1711 r = FLD_MOD(r, lane_number + 1, offset + 2, offset); in dsi_set_lane_config()
1712 r = FLD_MOD(r, polarity, offset + 3, offset + 3); in dsi_set_lane_config()
1719 r = FLD_MOD(r, 0, offset + 2, offset); in dsi_set_lane_config()
1720 r = FLD_MOD(r, 0, offset + 3, offset + 3); in dsi_set_lane_config()
1796 r = FLD_MOD(r, ths_prepare, 31, 24); in dsi_cio_timings()
1797 r = FLD_MOD(r, ths_prepare_ths_zero, 23, 16); in dsi_cio_timings()
1798 r = FLD_MOD(r, ths_trail, 15, 8); in dsi_cio_timings()
1799 r = FLD_MOD(r, ths_exit, 7, 0); in dsi_cio_timings()
1803 r = FLD_MOD(r, tlpx_half, 20, 16); in dsi_cio_timings()
[all …]
Ddss.c59 FLD_MOD(dss_read_reg(dss, idx), val, start, end))
250 l = FLD_MOD(l, 0xf, 19, 15); /* SDI_PDIV */ in dss_sdi_init()
251 l = FLD_MOD(l, datapairs-1, 3, 2); /* SDI_PRSEL */ in dss_sdi_init()
252 l = FLD_MOD(l, 2, 1, 0); /* SDI_BWSEL */ in dss_sdi_init()
256 l = FLD_MOD(l, 0x7, 25, 22); /* SDI_PLL_FREQSEL */ in dss_sdi_init()
257 l = FLD_MOD(l, 0xb, 16, 11); /* SDI_PLL_REGN */ in dss_sdi_init()
258 l = FLD_MOD(l, 0xb4, 10, 1); /* SDI_PLL_REGM */ in dss_sdi_init()
Dhdmi5_core.c329 r = FLD_MOD(r, vsync_pol, 6, 6); in hdmi_core_video_config()
330 r = FLD_MOD(r, hsync_pol, 5, 5); in hdmi_core_video_config()
331 r = FLD_MOD(r, cfg->data_enable_pol, 4, 4); in hdmi_core_video_config()
332 r = FLD_MOD(r, cfg->vblank_osc, 1, 1); in hdmi_core_video_config()
333 r = FLD_MOD(r, !!(vm->flags & DISPLAY_FLAGS_INTERLACED), 0, 0); in hdmi_core_video_config()
Dhdmi4_cec.c235 temp = FLD_MOD(temp, 0, 4, 4); in hdmi_cec_adap_enable()
244 temp = FLD_MOD(0x0, 0x5, 2, 0); in hdmi_cec_adap_enable()
Ddispc.c55 FLD_MOD(dispc_read_reg(dispc, idx), val, start, end))
1200 val = FLD_MOD(val, chan, shift, shift); in dispc_ovl_set_channel_out()
1201 val = FLD_MOD(val, chan2, 31, 30); in dispc_ovl_set_channel_out()
1203 val = FLD_MOD(val, channel, shift, shift); in dispc_ovl_set_channel_out()
1340 val = FLD_MOD(val, enable, 9, 9); in dispc_ovl_set_vid_color_conv()
1407 v = FLD_MOD(v, 4, 2, 0); /* GFX BUF top to WB */ in dispc_init_fifos()
1408 v = FLD_MOD(v, 4, 5, 3); /* GFX BUF bottom to WB */ in dispc_init_fifos()
1409 v = FLD_MOD(v, 0, 26, 24); /* WB BUF top to GFX */ in dispc_init_fifos()
1410 v = FLD_MOD(v, 0, 29, 27); /* WB BUF bottom to GFX */ in dispc_init_fifos()
2839 l = FLD_MOD(l, truncation, 10, 10); /* TRUNCATIONENABLE */ in dispc_wb_setup()
[all …]
Dvideo-pll.c26 writel_relaxed(FLD_MOD(readl_relaxed(reg), val, start, end), reg)
Dhdmi5.c89 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ in hdmi_irq_handler()
90 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ in hdmi_irq_handler()
Dhdmi.h277 hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
Ddss.h67 #define FLD_MOD(orig, val, start, end) \ macro
/Linux-v5.4/drivers/gpu/drm/gma500/
Dmdfld_dsi_output.h47 #define FLD_MOD(orig, val, start, end) \ macro
51 REG_WRITE(reg, FLD_MOD(REG_READ(reg), val, start, end))