Searched refs:EP0_W1C_BITS (Results 1 – 3 of 3) sorted by relevance
142 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_stall_set()300 value = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; in handle_test_mode()512 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_rx_state()588 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_tx_state()601 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_read_setup()672 (mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS) in ep0_handle_setup()735 (csr & EP0_W1C_BITS) | EP0_DATAEND); in mtu3_ep0_isr()808 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_queue()
123 #define EP0_W1C_BITS (~(EP0_RXPKTRDY | EP0_SETUPPKTRDY | EP0_SENTSTALL)) macro
487 csr &= EP0_W1C_BITS; in mtu3_ep0_setup()
