Searched refs:EIP197_CS_RAM_CTRL (Results 1 – 2 of 2) sorted by relevance
69 val = readl(priv->base + EIP197_CS_RAM_CTRL); in eip197_trc_cache_banksel()72 writel(val, priv->base + EIP197_CS_RAM_CTRL); in eip197_trc_cache_banksel()167 val = readl(priv->base + EIP197_CS_RAM_CTRL); in eip197_trc_cache_init()170 writel(val, priv->base + EIP197_CS_RAM_CTRL); in eip197_trc_cache_init()171 val = readl(priv->base + EIP197_CS_RAM_CTRL); in eip197_trc_cache_init()232 val = readl(priv->base + EIP197_CS_RAM_CTRL); in eip197_trc_cache_init()234 writel(val, priv->base + EIP197_CS_RAM_CTRL); in eip197_trc_cache_init()
187 #define EIP197_CS_RAM_CTRL 0xf7ff0 macro
