Searched refs:EDP_PSR_CTL (Results 1 – 3 of 3) sorted by relevance
494 val |= I915_READ(EDP_PSR_CTL) & EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK; in hsw_activate_psr1()495 I915_WRITE(EDP_PSR_CTL, val); in hsw_activate_psr1()531 I915_WRITE(EDP_PSR_CTL, 0); in hsw_activate_psr2()653 WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); in intel_psr_activate()787 WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); in intel_psr_exit()796 val = I915_READ(EDP_PSR_CTL); in intel_psr_exit()798 I915_WRITE(EDP_PSR_CTL, val & ~EDP_PSR_ENABLE); in intel_psr_exit()
2198 val = I915_READ(EDP_PSR_CTL); in i915_edp_psr_status()
4198 #define EDP_PSR_CTL _MMIO(dev_priv->psr_mmio_base + 0) macro
