Searched refs:DRAM (Results 1 – 25 of 63) sorted by relevance
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| /Linux-v5.4/Documentation/devicetree/bindings/devfreq/ |
| D | rk3399_dmc.txt | 39 clocks freq is half of DRAM clock), default
56 The controller, pi, PHY and DRAM clock will
70 - rockchip,ddr3_odt_dis_freq : When the DRAM type is DDR3, this parameter defines
73 the ODT on the DRAM side and controller side are
76 - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines
77 the DRAM side driver strength in ohms. Default
80 - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines
81 the DRAM side ODT strength in ohms. Default value
84 - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines
89 - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines
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| D | exynos-bus.txt | 3 The Samsung Exynos SoC has many buses for data transfer between DRAM
108 VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller)
143 transfer data between DRAM and CPU and uses the VDD_MIF regulator.
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| /Linux-v5.4/Documentation/devicetree/bindings/media/ |
| D | cedrus.txt | 4 The VPU can only access the first 256 MiB of DRAM, that are DMA-mapped starting
5 from the DRAM base. This requires specific memory allocation and handling.
36 /* Address must be kept in the lower 256 MiBs of DRAM for VE. */
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| D | sun6i-csi.txt | 18 * ram: the CSI DRAM clock
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| /Linux-v5.4/drivers/memory/tegra/ |
| D | Kconfig | 16 Tegra20 chips. The EMC controls the external DRAM on the board.
26 Tegra124 chips. The EMC controls the external DRAM on the board.
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| /Linux-v5.4/sound/isa/gus/ |
| D | gus_dram.c | 28 outsb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_poke()
64 insb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_peek()
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| /Linux-v5.4/Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra210-bpmp.txt | 6 (suspend to ram), and also offloading DRAM memory clock scaling on
23 - #clock-cells : Should be 1 for platforms where DRAM clock control is
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| /Linux-v5.4/arch/arm/ |
| D | Kconfig-nommu | 14 hex '(S)DRAM Base Address' if SET_MEM_PARAM
18 hex '(S)DRAM SIZE' if SET_MEM_PARAM
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| /Linux-v5.4/arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-board-base.dtsi | 22 &memory { /* Default DRAM banks */
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| /Linux-v5.4/arch/arm/mach-lpc32xx/ |
| D | suspend.S | 53 @ This guarantees a small windows where DRAM isn't busy
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| /Linux-v5.4/Documentation/admin-guide/perf/ |
| D | imx-ddr.rst | 5 There are no performance counters inside the DRAM controller, so performance
27 from different DRAM controller implementations, which is distinguished by quirks
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| /Linux-v5.4/Documentation/x86/ |
| D | amd-memory-encryption.rst | 12 automatically decrypted when read from DRAM and encrypted when written to
13 DRAM. SME can therefore be used to protect the contents of DRAM from physical
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| /Linux-v5.4/Documentation/arm/sa1100/ |
| D | lart.rst | 6 applications. It has 32 MB DRAM, 4MB Flash ROM, double RS232 and all
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| /Linux-v5.4/Documentation/devicetree/bindings/nds32/ |
| D | atl2c.txt | 7 reducing DRAM accesses.
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| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | sun9i-de.txt | 12 - "dram": the DRAM bus clock for the system
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| /Linux-v5.4/arch/x86/ras/ |
| D | Kconfig | 13 have ECC DIMMs and doesn't have DRAM ECC checking enabled in the BIOS.
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| /Linux-v5.4/Documentation/driver-api/ |
| D | edac.rst | 18 The individual DRAM chips on a memory stick. These devices commonly
69 This is the name of the DRAM signal used to select the DRAM ranks to be
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| /Linux-v5.4/Documentation/devicetree/bindings/arm/ |
| D | fw-cfg.txt | 12 DTB that QEMU places at the bottom of the guest's DRAM.
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| /Linux-v5.4/arch/c6x/kernel/ |
| D | vectors.S | 9 ; At RESET the processor sets up the DRAM timing parameters and
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| /Linux-v5.4/Documentation/devicetree/bindings/mmc/ |
| D | amlogic,meson-gx.txt | 27 DRAM memory, like on the G12A dedicated SDIO controller.
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | berlin2cd-valve-steamlink.dts | 43 * DRAM (providing 1.35V). The other regulator on the opposite side
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| D | imx6ul-pico.dtsi | 137 /* DRAM */
145 /* DRAM */
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| /Linux-v5.4/drivers/powercap/ |
| D | Kconfig | 32 fine grained control. These domains include processor package, DRAM
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| /Linux-v5.4/Documentation/devicetree/bindings/net/ |
| D | marvell-neta-bm.txt | 13 in DRAM. Can be set for each pool (id 0 : 3) separately. The value has
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| /Linux-v5.4/drivers/edac/ |
| D | Kconfig | 81 Support for error detection and correction of DRAM ECC errors on
91 errors into DRAM.
101 which trigger the DRAM ECC Read and Write respectively.
165 E3-1200 based DRAM controllers.
366 tristate "Cavium Octeon DRAM Memory Controller (LMC)"
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