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Searched refs:DRA7XX_CM_CORE_CORE_INST (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.4/arch/arm/mach-omap2/
Dcm2_7xx.h32 #define DRA7XX_CM_CORE_CORE_INST 0x0700 macro
165 #define DRA7XX_CM_L3MAIN1_L3_MAIN_1_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x00…
167 #define DRA7XX_CM_L3MAIN1_GPMC_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x0028)
169 #define DRA7XX_CM_L3MAIN1_MMU_EDMA_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x003…
171 #define DRA7XX_CM_L3MAIN1_OCMC_RAM1_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x00…
173 #define DRA7XX_CM_L3MAIN1_OCMC_RAM2_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x00…
175 #define DRA7XX_CM_L3MAIN1_OCMC_RAM3_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x00…
177 #define DRA7XX_CM_L3MAIN1_OCMC_ROM_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x006…
179 #define DRA7XX_CM_L3MAIN1_TPCC_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x0070)
181 #define DRA7XX_CM_L3MAIN1_TPTC1_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x0078)
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Dclockdomains7xx_data.c380 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
416 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
489 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
499 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
531 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
541 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
561 .cm_inst = DRA7XX_CM_CORE_CORE_INST,