Searched refs:DP_TRAINING_LANE0_SET (Results 1 – 9 of 9) sorted by relevance
/Linux-v5.4/drivers/gpu/drm/i915/display/ |
D | intel_dp_link_training.c | 111 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, in intel_dp_update_link_train()
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/Linux-v5.4/drivers/gpu/drm/bridge/analogix/ |
D | analogix_dp_core.c | 318 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf, in analogix_dp_link_start() 529 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_clock_recovery() 603 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_equalizer_training()
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/Linux-v5.4/drivers/gpu/drm/amd/display/dc/core/ |
D | dc_link_dp.c | 277 &dpcd_lt_buffer[DP_TRAINING_LANE0_SET - dpcd_base_lt_offset], in dpcd_set_lt_pattern_and_lane_settings() 283 DP_TRAINING_LANE0_SET, in dpcd_set_lt_pattern_and_lane_settings() 301 DP_TRAINING_LANE0_SET, in dpcd_set_lt_pattern_and_lane_settings() 600 DP_TRAINING_LANE0_SET, in dpcd_set_lane_settings() 625 DP_TRAINING_LANE0_SET, in dpcd_set_lane_settings()
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/Linux-v5.4/drivers/gpu/drm/tegra/ |
D | dpaux.c | 801 err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, values, in drm_dp_aux_train()
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/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
D | atombios_dp.c | 501 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in amdgpu_atombios_dp_update_vs_emph()
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/Linux-v5.4/drivers/gpu/drm/radeon/ |
D | atombios_dp.c | 563 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in radeon_dp_update_vs_emph()
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/Linux-v5.4/include/drm/ |
D | drm_dp_helper.h | 400 #define DP_TRAINING_LANE0_SET 0x103 macro
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/Linux-v5.4/drivers/gpu/drm/bridge/ |
D | tc358767.c | 992 ret = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, tmp, 2); in tc_main_link_enable()
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/Linux-v5.4/drivers/gpu/drm/gma500/ |
D | cdv_intel_dp.c | 1420 DP_TRAINING_LANE0_SET, in cdv_intel_dplink_set_level()
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