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Searched refs:DPMTABLE_OD_UPDATE_MCLK (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/radeon/
Dci_dpm.h190 #define DPMTABLE_OD_UPDATE_MCLK 0x00000002 macro
Dci_dpm.c1470 (pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) { in ci_unfreeze_sclk_mclk_dpm()
1578 (pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) { in ci_freeze_sclk_mclk_dpm()
3890 pi->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; in ci_find_dpm_states_clocks_in_dpm_table()
3913 if (pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK) in ci_populate_and_upload_sclk_mclk_dpm_levels()
3922 if (pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_MCLK | DPMTABLE_UPDATE_MCLK)) { in ci_populate_and_upload_sclk_mclk_dpm_levels()
4773 if (!(pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) in ci_update_and_upload_mc_reg_table()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega12_hwmgr.h176 #define DPMTABLE_OD_UPDATE_MCLK 0x00000002 macro
Dvega20_hwmgr.h229 #define DPMTABLE_OD_UPDATE_MCLK 0x00000002 macro
Dsmu7_hwmgr.c917 data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; in smu7_check_dpm_table_updated()
927 data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_MCLK; in smu7_check_dpm_table_updated()
942 data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK; in smu7_check_dpm_table_updated()
3635 data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; in smu7_find_dpm_states_clocks_in_dpm_table()
3741 DPMTABLE_OD_UPDATE_MCLK)) { in smu7_freeze_sclk_mclk_dpm()
3775 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3791 (DPMTABLE_OD_UPDATE_MCLK + DPMTABLE_UPDATE_MCLK)) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3891 (data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) { in smu7_unfreeze_sclk_mclk_dpm()
4225 DPMTABLE_OD_UPDATE_MCLK | in smu7_check_states_equal()
Dvega10_hwmgr.c1773 if (data->need_update_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in vega10_populate_single_memory_level()
2470 data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_MCLK; in vega10_check_dpm_table_updated()
2511 data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK; in vega10_init_smc_table()
3317 data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; in vega10_find_dpm_states_clocks_in_dpm_table()
3347 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()
3361 (DPMTABLE_OD_UPDATE_MCLK + DPMTABLE_UPDATE_MCLK)) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()
5183 data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; in vega10_odn_edit_dpm_table()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/
Dhardwaremanager.h378 #define DPMTABLE_OD_UPDATE_MCLK 0x00000002 macro
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Diceland_smumgr.c1782 if (0 == (data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) in iceland_update_and_upload_mc_reg_table()
2168 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in iceland_program_mem_timing_parameters()
Dci_smumgr.c1815 if (0 == (data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) in ci_update_and_upload_mc_reg_table()
2203 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in ci_program_mem_timing_parameters()
Dtonga_smumgr.c2161 if (0 == (data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) in tonga_update_and_upload_mc_reg_table()
2557 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in tonga_program_mem_timing_parameters()
Dfiji_smumgr.c2258 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in fiji_program_mem_timing_parameters()
Dpolaris10_smumgr.c2038 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in polaris10_program_mem_timing_parameters()