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Searched refs:DPIO_CH0 (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/i915/gvt/
Dhandlers.c3178 MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3179 MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3180 MMIO_D(BXT_PORT_PCS_DW10_LN01(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3181 MMIO_D(BXT_PORT_PCS_DW10_GRP(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3182 MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3183 MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3184 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
3186 MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3187 MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH0), D_BXT); in init_bxt_mmio_info()
3188 MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
[all …]
/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_dpio_phy.c167 [DPIO_CH0] = { .port = PORT_B },
177 [DPIO_CH0] = { .port = PORT_A },
190 [DPIO_CH0] = { .port = PORT_B },
200 [DPIO_CH0] = { .port = PORT_A },
210 [DPIO_CH0] = { .port = PORT_C },
248 if (port == phy_info->channel[DPIO_CH0].port) { in bxt_port_to_phy_channel()
250 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
264 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
797 if (ch == DPIO_CH0 && pipe == PIPE_B) in chv_phy_pre_pll_enable()
812 if (ch == DPIO_CH0) in chv_phy_pre_pll_enable()
[all …]
Dintel_display_power.c1306 phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0) | in assert_chv_phy_status()
1307 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) | in assert_chv_phy_status()
1308 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) | in assert_chv_phy_status()
1314 phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY1, DPIO_CH0) | in assert_chv_phy_status()
1315 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0) | in assert_chv_phy_status()
1316 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 1)); in assert_chv_phy_status()
1322 if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0)) == 0) in assert_chv_phy_status()
1323 phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
1330 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0) | in assert_chv_phy_status()
1332 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
[all …]
Dintel_display_types.h1303 return DPIO_CH0; in vlv_dport_to_channel()
1331 return DPIO_CH0; in vlv_pipe_to_channel()
Dintel_display.h235 DPIO_CH0, enumerator