Searched refs:DPHY_CLK_TIMING_PARAM (Results 1 – 2 of 2) sorted by relevance
511 I915_WRITE(DPHY_CLK_TIMING_PARAM(port), intel_dsi->dphy_reg); in gen11_dsi_setup_dphy_timings()
10855 #define DPHY_CLK_TIMING_PARAM(port) _MMIO_PORT(port, \ macro
