Searched refs:DPCLKA_CFGCR0_DDI_CLK_SEL_MASK (Results 1 – 3 of 3) sorted by relevance
2941 val &= ~DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); in intel_ddi_clk_select()
10078 temp = I915_READ(DPCLKA_CFGCR0) & DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); in cannonlake_get_ddi_pll()
9734 #define DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port) (3 << DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port)) macro