Searched refs:DMA_CHAN_INTR_ENA (Results 1 – 3 of 3) sorted by relevance
103 DMA_CHAN_INTR_ENA(chan)); in dwmac4_enable_dma_irq()109 ioaddr + DMA_CHAN_INTR_ENA(chan)); in dwmac410_enable_dma_irq()114 writel(0, ioaddr + DMA_CHAN_INTR_ENA(chan)); in dwmac4_disable_dma_irq()121 u32 intr_en = readl(ioaddr + DMA_CHAN_INTR_ENA(chan)); in dwmac4_dma_interrupt()
116 ioaddr + DMA_CHAN_INTR_ENA(chan)); in dwmac4_dma_init_channel()159 reg_space[DMA_CHAN_INTR_ENA(channel) / 4] = in _dwmac4_dump_dma_regs()160 readl(ioaddr + DMA_CHAN_INTR_ENA(channel)); in _dwmac4_dump_dma_regs()
100 #define DMA_CHAN_INTR_ENA(x) (DMA_CHANX_BASE_ADDR(x) + 0x34) macro
