Home
last modified time | relevance | path

Searched refs:DIDT_TCP_CTRL0__PHASE_OFFSET_MASK (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu7_powertune.c230 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_…
372 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_…
514 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_…
659 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_…
844 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_…
Dvega10_powertune.c236 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_TCP_CTRL0__PHASE_OF…
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h18403 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK 0xc macro
Dgfx_8_1_sh_mask.h21259 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK 0xc macro
Dgfx_8_0_sh_mask.h20651 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK 0xc macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h29439 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK … macro
Dgc_9_2_1_sh_mask.h30909 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK … macro
Dgc_9_1_sh_mask.h30668 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK … macro
Dgc_10_1_0_sh_mask.h43725 #define DIDT_TCP_CTRL0__PHASE_OFFSET_MASK … macro