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Searched refs:DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu7_powertune.c144 … DIDT_SQ_CTRL0__PHASE_OFFSET_MASK, DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT, …
286 … DIDT_SQ_CTRL0__PHASE_OFFSET_MASK, DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT, …
428 … DIDT_SQ_CTRL0__PHASE_OFFSET_MASK, DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT, …
571 … DIDT_SQ_CTRL0__PHASE_OFFSET_MASK, DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT, …
754 … DIDT_SQ_CTRL0__PHASE_OFFSET_MASK, DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT, …
Dvega10_powertune.c212 …RL0, DIDT_SQ_CTRL0__PHASE_OFFSET_MASK, DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT, 0x…
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h18272 #define DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
Dgfx_8_1_sh_mask.h21092 #define DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
Dgfx_8_0_sh_mask.h20490 #define DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h28687 #define DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT … macro
Dgc_9_2_1_sh_mask.h30252 #define DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT … macro
Dgc_9_1_sh_mask.h29930 #define DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT … macro
Dgc_10_1_0_sh_mask.h42907 #define DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT … macro