Searched refs:DFLEXDPMLE1_DPMLETC_ML3_2 (Results 1 – 2 of 2) sorted by relevance
115 val |= lane_reversal ? DFLEXDPMLE1_DPMLETC_ML3_2(tc_port) : in intel_tc_port_set_fia_lane_count()
2180 #define DFLEXDPMLE1_DPMLETC_ML3_2(tc_port) (12 << (4 * (tc_port))) macro
