Searched refs:DFLEXDPMLE1_DPMLETC_ML3 (Results 1 – 2 of 2) sorted by relevance
111 val |= lane_reversal ? DFLEXDPMLE1_DPMLETC_ML3(tc_port) : in intel_tc_port_set_fia_lane_count()
2179 #define DFLEXDPMLE1_DPMLETC_ML3(tc_port) (8 << (4 * (tc_port))) macro
