Searched refs:DFL (Results 1 – 6 of 6) sorted by relevance
142 tristate "FPGA Device Feature List (DFL) support"146 Device Feature List (DFL) defines a feature list structure that158 tristate "FPGA DFL FME Driver"162 under Device Feature List (DFL) framework. Select this option to165 per DFL based FPGA device.168 tristate "FPGA DFL FME Manager Driver"174 tristate "FPGA DFL FME Bridge Driver"180 tristate "FPGA DFL FME Region Driver"186 tristate "FPGA DFL AFU Driver"192 Port/AFU per DFL based FPGA device.[all …]
2 FPGA Device Feature List (DFL) Framework Overview11 The Device Feature List (DFL) FPGA framework (and drivers according to this15 implement the DFL in the device memory. Besides this, the DFL framework19 Device Feature List (DFL) Overview21 Device Feature List (DFL) defines a linked list of feature headers within the157 DFL Framework Overview172 | FPGA DFL Device Module |179 DFL framework in kernel provides common interfaces to create container device186 The FPGA DFL Device could be different hardwares, e.g. PCIe device, platform190 and related resources to common interfaces from DFL framework for enumeration.[all …]
58 #define DFL( x ) D4C( rs -> s_v1.x ) macro230 int hash_code = DFL(s_hash_function_code); in show_on_disk_super()248 DFL(s_block_count), in show_on_disk_super()249 DFL(s_free_blocks), in show_on_disk_super()250 DFL(s_root_block), in show_on_disk_super()
5 Description: Read-only. One DFL FPGA device may have more than 1
5 Description: Read-only. It returns id of this port. One DFL FPGA device
6429 FPGA DFL DRIVERS
