Searched refs:DC_OK (Results 1 – 16 of 16) sorted by relevance
34 return DC_OK; in core_link_read_dpcd()49 return DC_OK; in core_link_write_dpcd()128 enum dc_status result = DC_OK; in edp_receiver_ready_T9()138 if (result != DC_OK) in edp_receiver_ready_T9()153 enum dc_status result = DC_OK; in edp_receiver_ready_T7()156 if (result == DC_OK && edpRev < DP_EDP_12) in edp_receiver_ready_T7()164 if (result != DC_OK) in edp_receiver_ready_T7()
1458 if (retval != DC_OK) in read_hpd_rx_irq_data()1529 if (dpcd_result != DC_OK) { in hpd_rx_irq_check_link_loss_status()1614 if (read_hpd_rx_irq_data(link, &irq_data) == DC_OK) in dp_verify_link_cap()2387 if (result != DC_OK) { in dc_link_handle_hpd_rx_irq()2471 enum dc_status st = DC_OK; in is_mst_supported()2486 if (st == DC_OK && rev.raw >= DPCD_REV_12) { in is_mst_supported()2490 if (st == DC_OK && cap.bits.MST_CAP == 1) in is_mst_supported()2738 if (status != DC_OK || dpcd_power_state == DP_SET_POWER_D3) in retrieve_link_cap()2747 if (status == DC_OK) in retrieve_link_cap()2751 if (status != DC_OK) { in retrieve_link_cap()[all …]
545 if (status == DC_OK) { in read_edp_current_link_settings_on_detect()1522 status = DC_OK; in enable_link_dp()1529 status = DC_OK; in enable_link_dp()1566 return DC_OK; in enable_link_dp_mst()2127 status = DC_OK; in enable_link()2131 status = DC_OK; in enable_link()2134 status = DC_OK; in enable_link()2140 if (status == DC_OK) in enable_link()2280 return DC_OK; in dc_link_validate_mode_timing()2303 return DC_OK; in dc_link_validate_mode_timing()[all …]
1065 return DC_OK; in resource_build_scaling_params_for_context()1702 if (res != DC_OK) in dc_add_stream_to_ctx()1782 return DC_OK; in dc_remove_stream_from_ctx()1997 return DC_OK; in resource_map_pool_resources()2047 if (result != DC_OK) in dc_validate_global_state()2064 if (result != DC_OK) in dc_validate_global_state()2091 if (result == DC_OK) in dc_validate_global_state()2569 return DC_OK; in resource_map_clock_resources()2750 enum dc_status res = DC_OK; in dc_validate_stream()2757 if (res == DC_OK) { in dc_validate_stream()[all …]
1098 if (result != DC_OK) in dc_commit_state_no_check()1167 return DC_OK; in dc_commit_state()1180 return (result == DC_OK); in dc_commit_state()
30 DC_OK = 1, enumerator
762 return DC_OK; in build_mapped_resource()817 return DC_OK; in dce100_validate_global()829 if (result == DC_OK) in dce100_add_stream_to_ctx()832 if (result == DC_OK) in dce100_add_stream_to_ctx()851 return DC_OK; in dce100_validate_plane()
1066 return DC_OK; in build_mapped_resource()1078 if (result == DC_OK) in dcn10_add_stream_to_ctx()1082 if (result == DC_OK) in dcn10_add_stream_to_ctx()1144 return DC_OK; in dcn10_validate_plane()1194 return DC_OK; in dcn10_validate_global()1199 enum dc_status result = DC_OK; in dcn10_get_default_swizzle_mode()
745 return DC_OK; in dcn10_enable_stream_timing()813 return DC_OK; in dcn10_enable_stream_timing()3294 return DC_OK; in dcn10_set_clock()
887 return DC_OK; in build_mapped_resource()971 return DC_OK; in dce110_validate_plane()1026 return DC_OK; in dce110_validate_global()1038 if (result == DC_OK) in dce110_add_stream_to_ctx()1042 if (result == DC_OK) in dce110_add_stream_to_ctx()
1321 return DC_OK; in dce110_enable_stream_timing()1423 return DC_OK; in apply_single_controller_ctx_to_hw()2043 return DC_OK; in dce110_apply_ctx_to_hw()2098 if (DC_OK != status) in dce110_apply_ctx_to_hw()2107 return DC_OK; in dce110_apply_ctx_to_hw()
809 return DC_OK; in build_mapped_resource()914 return DC_OK; in resource_map_phy_clock_resources()946 if (result == DC_OK) in dce112_add_stream_to_ctx()950 if (result == DC_OK) in dce112_add_stream_to_ctx()963 return DC_OK; in dce112_validate_global()
1383 return DC_OK; in build_pipe_hw_param()1388 enum dc_status status = DC_OK; in dcn20_build_mapped_resource()1460 enum dc_status result = DC_OK; in add_dsc_to_stream_resource()1505 return DC_OK; in remove_dsc_from_stream_resource()1516 if (result == DC_OK) in dcn20_add_stream_to_ctx()1521 if (result == DC_OK && dc_stream->timing.flags.DSC) in dcn20_add_stream_to_ctx()1525 if (result == DC_OK) in dcn20_add_stream_to_ctx()1534 enum dc_status result = DC_OK; in dcn20_remove_stream_from_ctx()2869 enum dc_status result = DC_OK; in dcn20_get_default_swizzle_mode()
541 return DC_OK; in dcn20_enable_stream_timing()621 return DC_OK; in dcn20_enable_stream_timing()
4084 enum dc_status dc_result = DC_OK; in amdgpu_dm_connector_mode_valid()4113 if (dc_result == DC_OK) in amdgpu_dm_connector_mode_valid()4374 if (dc_validate_stream(dc, dm_crtc_state->stream) == DC_OK) in dm_crtc_helper_atomic_check()4585 if (dc_validate_plane(dc, dm_plane_state->dc_state) == DC_OK) in dm_plane_atomic_check()6713 dm_old_crtc_state->stream) != DC_OK) { in dm_update_crtc_state()6756 dm_new_crtc_state->stream) != DC_OK) { in dm_update_crtc_state()7407 if (dc_validate_global_state(dc, dm_state->context, false) != DC_OK) { in amdgpu_dm_atomic_check()
851 return DC_OK; in dce80_validate_global()
