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Searched refs:DC_CMD_STATE_CONTROL (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/tegra/
Dhub.c172 tegra_dc_writel(dc, mask, DC_CMD_STATE_CONTROL); in tegra_shared_plane_update()
177 value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_shared_plane_update()
192 tegra_dc_writel(dc, mask, DC_CMD_STATE_CONTROL); in tegra_shared_plane_activate()
197 value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_shared_plane_activate()
673 tegra_dc_writel(dc, COMMON_UPDATE, DC_CMD_STATE_CONTROL); in tegra_display_hub_update()
674 tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_display_hub_update()
675 tegra_dc_writel(dc, COMMON_ACTREQ, DC_CMD_STATE_CONTROL); in tegra_display_hub_update()
676 tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_display_hub_update()
Ddc.c116 tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); in tegra_dc_commit()
117 tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); in tegra_dc_commit()
1227 DEBUGFS_REG32(DC_CMD_STATE_CONTROL),
1918 tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL); in tegra_crtc_atomic_flush()
1919 value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_crtc_atomic_flush()
1922 tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL); in tegra_crtc_atomic_flush()
1923 value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_crtc_atomic_flush()
Ddc.h228 #define DC_CMD_STATE_CONTROL 0x041 macro