Searched refs:DCFCLKPerState (Results 1 – 5 of 5) sorted by relevance
3444 locals->ReturnBWToDCNPerState = dml_min(locals->ReturnBusWidth * locals->DCFCLKPerState[i], in dml20_ModeSupportAndSystemConfigurationFull()3450 …EnabledInAnyPlane == true && locals->ReturnBWToDCNPerState > locals->DCFCLKPerState[i] * locals->R… in dml20_ModeSupportAndSystemConfigurationFull()3454 / (locals->ReturnBWToDCNPerState - locals->DCFCLKPerState[i] in dml20_ModeSupportAndSystemConfigurationFull()3457 locals->CriticalPoint = 2 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * in dml20_ModeSupportAndSystemConfigurationFull()3465 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * locals->UrgentLatency / in dml20_ModeSupportAndSystemConfigurationFull()3471 locals->DCFCLKPerState[i], locals->FabricAndDRAMBandwidthPerState[i] * 1000); in dml20_ModeSupportAndSystemConfigurationFull()3473 …EnabledInAnyPlane == true && locals->ReturnBWToDCNPerState > locals->DCFCLKPerState[i] * locals->R… in dml20_ModeSupportAndSystemConfigurationFull()3477 / (locals->ReturnBWToDCNPerState - locals->DCFCLKPerState[i] in dml20_ModeSupportAndSystemConfigurationFull()3480 locals->CriticalPoint = 2 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * in dml20_ModeSupportAndSystemConfigurationFull()3488 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * locals->UrgentLatency / in dml20_ModeSupportAndSystemConfigurationFull()[all …]
3476 locals->ReturnBWToDCNPerState = dml_min(locals->ReturnBusWidth * locals->DCFCLKPerState[i], in dml20v2_ModeSupportAndSystemConfigurationFull()3482 …EnabledInAnyPlane == true && locals->ReturnBWToDCNPerState > locals->DCFCLKPerState[i] * locals->R… in dml20v2_ModeSupportAndSystemConfigurationFull()3486 / (locals->ReturnBWToDCNPerState - locals->DCFCLKPerState[i] in dml20v2_ModeSupportAndSystemConfigurationFull()3489 locals->CriticalPoint = 2 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * in dml20v2_ModeSupportAndSystemConfigurationFull()3497 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * locals->UrgentLatency / in dml20v2_ModeSupportAndSystemConfigurationFull()3503 locals->DCFCLKPerState[i], locals->FabricAndDRAMBandwidthPerState[i] * 1000); in dml20v2_ModeSupportAndSystemConfigurationFull()3505 …EnabledInAnyPlane == true && locals->ReturnBWToDCNPerState > locals->DCFCLKPerState[i] * locals->R… in dml20v2_ModeSupportAndSystemConfigurationFull()3509 / (locals->ReturnBWToDCNPerState - locals->DCFCLKPerState[i] in dml20v2_ModeSupportAndSystemConfigurationFull()3512 locals->CriticalPoint = 2 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * in dml20v2_ModeSupportAndSystemConfigurationFull()3520 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * locals->UrgentLatency / in dml20v2_ModeSupportAndSystemConfigurationFull()[all …]
396 double DCFCLKPerState[DC__VOLTAGE_STATES + 1]; member
254 mode_lib->vba.DCFCLKPerState[i] = soc->clock_limits[i].dcfclk_mhz; in fetch_socbb_params()
3544 mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLKPerState[i], in dml21_ModeSupportAndSystemConfigurationFull()3586 (mode_lib->vba.RoundTripPingLatencyCycles + 32.0) / mode_lib->vba.DCFCLKPerState[i] in dml21_ModeSupportAndSystemConfigurationFull()4963 mode_lib->vba.DCFCLKPerState[i], in dml21_ModeSupportAndSystemConfigurationFull()5189 mode_lib->vba.DCFCLK = mode_lib->vba.DCFCLKPerState[mode_lib->vba.VoltageLevel]; in dml21_ModeSupportAndSystemConfigurationFull()
