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Searched refs:D15 (Results 1 – 24 of 24) sorted by relevance

/Linux-v5.4/arch/nds32/
DKconfig.cpu72 The data cache of N15/D15 is implemented as PIPT and it will not cause
78 A kernel built for N10 is able to run on N15, D15, N13, N10 or D10.
79 A kernel built for N15 is able to run on N15 or D15.
80 A kernel built for D10 is able to run on D10 or D15.
81 A kernel built for D15 is able to run on D15.
82 A kernel built for N13 is able to run on N15, N13 or D15.
93 bool "AndesCore D15"
/Linux-v5.4/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g4.c306 #define D15 32 macro
307 SIG_EXPR_LIST_DECL_SINGLE(D15, NCTS3, NCTS3, SIG_DESC_SET(SCU80, 16));
310 SIG_EXPR_LIST_DECL_DUAL(D15, GPIE0IN, GPIE0, GPIE);
311 PIN_DECL_2(D15, GPIOE0, NCTS3, GPIE0IN);
313 FUNC_GROUP_DECL(NCTS3, D15);
323 FUNC_GROUP_DECL(GPIE0, D15, C15);
1991 ASPEED_PINCTRL_PIN(D15),
2448 { PIN_CONFIG_BIAS_PULL_DOWN, { D15, B14 }, SCU8C, 20 },
2449 { PIN_CONFIG_BIAS_DISABLE, { D15, B14 }, SCU8C, 20 },
2538 { PIN_CONFIG_INPUT_DEBOUNCE, { D15, C15 }, SCUA8, 24 },
Dpinctrl-aspeed-g5.c459 #define D15 54 macro
460 SIG_EXPR_LIST_DECL_SINGLE(D15, SGPS2I0, SGPS2, COND1, SGPS2_DESC);
461 SIG_EXPR_LIST_DECL_SINGLE(D15, SALT3, SALT3, COND1, SIG_DESC_SET(SCU84, 6));
462 PIN_DECL_2(D15, GPIOG6, SGPS2I0, SALT3);
463 FUNC_GROUP_DECL(SALT3, D15);
471 FUNC_GROUP_DECL(SGPS2, E17, D16, D15, E14);
1979 ASPEED_PINCTRL_PIN(D15),
Dpinctrl-aspeed-g6.c648 #define D15 88 macro
649 SIG_EXPR_LIST_DECL_SESG(D15, SCL9, I2C9, SIG_DESC_SET(SCU418, 24));
650 PIN_DECL_1(D15, GPIOL0, SCL9);
656 FUNC_GROUP_DECL(I2C9, D15, A14);
1691 ASPEED_PINCTRL_PIN(D15),
/Linux-v5.4/drivers/pinctrl/sh-pfc/
Dpfc-r8a77970.c209 #define IP7_3_0 FM(VI1_FIELD) FM(SDA4) FM(IRQ5) FM(D15) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F…
639 PINMUX_IPSR_GPSR(IP7_3_0, D15),
Dpfc-r8a77980.c242 #define IP7_3_0 FM(VI1_FIELD) FM(SDA4) F_(0, 0) FM(D15) FM(MMC_D7) F_(0, 0) F_(0, 0) F_(0, 0)…
711 PINMUX_IPSR_GPSR(IP7_3_0, D15),
Dpfc-sh7734.c802 PINMUX_IPSR_GPSR(IP3_1_0, D15),
1441 GPIO_FN(D15), GPIO_FN(SCK2_B),
Dpfc-r8a77990.c70 #define GPSR0_15 F_(D15, IP7_19_16)
276 #define IP7_19_16 FM(D15) FM(MSIOF2_SS1_A) FM(HTX3_A) FM(MSIOF3_SS1_A) F_(0, 0) FM(DU_DG3) F_(0…
945 PINMUX_IPSR_GPSR(IP7_19_16, D15),
Dpfc-r8a7795-es1.c82 #define GPSR0_15 F_(D15, IP7_11_8)
314 #define IP7_11_8 FM(D15) FM(LCDOUT7) FM(MSIOF3_SS2_A) FM(HTX3_C) FM(VI4_DATA7_A) F_(0, 0) FM(DU…
1015 PINMUX_IPSR_GPSR(IP7_11_8, D15),
Dpfc-r8a7795.c82 #define GPSR0_15 F_(D15, IP7_11_8)
315 #define IP7_11_8 FM(D15) FM(LCDOUT7) FM(MSIOF3_SS2_A) FM(HTX3_C) FM(VI4_DATA7_A) F_(0, 0) FM(DU…
1022 PINMUX_IPSR_GPSR(IP7_11_8, D15),
Dpfc-r8a7796.c86 #define GPSR0_15 F_(D15, IP7_11_8)
321 #define IP7_11_8 FM(D15) FM(LCDOUT7) FM(MSIOF3_SS2_A) FM(HTX3_C) FM(VI4_DATA7_A) F_(0, 0) FM(DU…
1025 PINMUX_IPSR_GPSR(IP7_11_8, D15),
Dpfc-r8a77965.c87 #define GPSR0_15 F_(D15, IP7_11_8)
322 #define IP7_11_8 FM(D15) FM(LCDOUT7) FM(MSIOF3_SS2_A) FM(HTX3_C) FM(VI4_DATA7_A) F_(0, 0) FM(DU…
1028 PINMUX_IPSR_GPSR(IP7_11_8, D15),
Dpfc-r8a7792.c362 PINMUX_SINGLE(D15),
Dpfc-sh7264.c1290 GPIO_FN(D15),
Dpfc-r8a73a4.c347 F1(D15), F5(GIO_OUT15),
Dpfc-sh7757.c1441 GPIO_FN(D15),
Dpfc-sh7724.c1394 GPIO_FN(D15),
Dpfc-r8a77470.c643 PINMUX_IPSR_GPSR(IP3_7_4, D15),
Dpfc-sh7269.c1712 GPIO_FN(D15),
Dpfc-r8a7794.c779 PINMUX_IPSR_GPSR(IP1_21_20, D15),
Dpfc-r8a7790.c893 PINMUX_IPSR_GPSR(IP1_25_22, D15),
Dpfc-r8a7791.c826 PINMUX_IPSR_GPSR(IP0_15, D15),
/Linux-v5.4/arch/arm/boot/dts/
Dsama5d4.dtsi1008 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with D15 and TDO */
/Linux-v5.4/drivers/pinctrl/
Dpinctrl-pic32.c1196 PIC32_PINCTRL_GROUP(63, D15,