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Searched refs:CP_ME_CNTL__CE_HALT_MASK (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v7_0.c2439 …2(mmCP_ME_CNTL, (CP_ME_CNTL__ME_HALT_MASK | CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_MASK)); in gfx_v7_0_cp_gfx_enable()
4664 …G32(mmCP_ME_CNTL, CP_ME_CNTL__ME_HALT_MASK | CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_MASK); in gfx_v7_0_soft_reset()
Dgfx_v6_0.c1960 CP_ME_CNTL__CE_HALT_MASK)); in gfx_v6_0_cp_gfx_enable()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2560 #define CP_ME_CNTL__CE_HALT_MASK 0x01000000L macro
Dgfx_7_2_sh_mask.h3045 #define CP_ME_CNTL__CE_HALT_MASK 0x1000000 macro
Dgfx_8_1_sh_mask.h4181 #define CP_ME_CNTL__CE_HALT_MASK 0x1000000 macro
Dgfx_8_0_sh_mask.h3659 #define CP_ME_CNTL__CE_HALT_MASK 0x1000000 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h1173 #define CP_ME_CNTL__CE_HALT_MASK … macro
Dgc_9_2_1_sh_mask.h1039 #define CP_ME_CNTL__CE_HALT_MASK … macro
Dgc_9_1_sh_mask.h1072 #define CP_ME_CNTL__CE_HALT_MASK … macro
Dgc_10_1_0_sh_mask.h6657 #define CP_ME_CNTL__CE_HALT_MASK … macro