Searched refs:CPOL (Results 1 – 5 of 5) sorted by relevance
26 #define CPOL BIT(2) macro212 cpol &= ~CPOL; in setup_fifo_params()219 cpol |= CPOL; in setup_fifo_params()
380 u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; in cs_activate()387 if ((csr ^ cpol) & SPI_BIT(CPOL)) in cs_activate()389 csr ^ SPI_BIT(CPOL)); in cs_activate()1195 csr |= SPI_BIT(CPOL); in atmel_spi_setup()
52 spi-cpol; /* SPI mode: CPOL=1 */
100 - CPOL indicates the initial clock polarity. CPOL=0 means the102 the second (trailing) edge is falling. CPOL=1 means the clock113 but their timing diagrams will make the CPOL and CPHA modes clear.115 In the SPI mode number, CPOL is the high order bit and CPHA is the117 starting low (CPOL=0) and data stabilized for sampling during the
7 - spi-cpol: The AD5592R requires inverse clock polarity (CPOL) mode
