Searched refs:CPLL_CFG0_PLL_DIV_RATIO_SHIFT (Results 1 – 2 of 2) sorted by relevance
62 #define CPLL_CFG0_PLL_DIV_RATIO_SHIFT 10 macro
427 div = (reg >> CPLL_CFG0_PLL_DIV_RATIO_SHIFT) & in mt7620_get_cpu_pll_rate()
