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Searched refs:CORE_MOD (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.4/arch/arm/mach-omap2/
Domap_hwmod_2xxx_ipblock_data.c237 .module_offs = CORE_MOD,
252 .module_offs = CORE_MOD,
267 .module_offs = CORE_MOD,
282 .module_offs = CORE_MOD,
297 .module_offs = CORE_MOD,
312 .module_offs = CORE_MOD,
327 .module_offs = CORE_MOD,
342 .module_offs = CORE_MOD,
357 .module_offs = CORE_MOD,
372 .module_offs = CORE_MOD,
[all …]
Domap_hwmod_2430_data.c86 .module_offs = CORE_MOD,
101 .module_offs = CORE_MOD,
116 .module_offs = CORE_MOD,
146 .module_offs = CORE_MOD,
159 .module_offs = CORE_MOD,
191 .module_offs = CORE_MOD,
235 .module_offs = CORE_MOD,
251 .module_offs = CORE_MOD,
267 .module_offs = CORE_MOD,
283 .module_offs = CORE_MOD,
[all …]
Dcm3xxx.c422 omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap3_cm_save_context()
424 omap2_cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3); in omap3_cm_save_context()
438 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN1); in omap3_cm_save_context()
440 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN2); in omap3_cm_save_context()
442 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN3); in omap3_cm_save_context()
464 omap2_cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL); in omap3_cm_save_context()
479 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1); in omap3_cm_save_context()
481 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2); in omap3_cm_save_context()
483 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3); in omap3_cm_save_context()
552 omap2_cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD, in omap3_cm_restore_context()
[all …]
Dpm24xx.c75 omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); in omap2_enter_full_retention()
76 omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); in omap2_enter_full_retention()
104 omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); in omap2_enter_full_retention()
105 omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); in omap2_enter_full_retention()
141 omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); in omap2_enter_mpu_retention()
142 omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); in omap2_enter_mpu_retention()
Domap_hwmod_2420_data.c100 .module_offs = CORE_MOD,
120 .module_offs = CORE_MOD,
151 .module_offs = CORE_MOD,
179 .module_offs = CORE_MOD,
195 .module_offs = CORE_MOD,
225 .module_offs = CORE_MOD,
239 .module_offs = CORE_MOD,
Dcm2xxx.c328 f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap2xxx_cm_fclks_active()
329 f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); in omap2xxx_cm_fclks_active()
339 l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap2xxx_cm_mpu_retention_allowed()
345 l = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); in omap2xxx_cm_mpu_retention_allowed()
374 tmp = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & in omap2xxx_cm_set_mod_dividers()
376 omap2_cm_write_mod_reg(core | tmp, CORE_MOD, CM_CLKSEL1); in omap2xxx_cm_set_mod_dividers()
Domap_hwmod_3xxx_data.c292 .module_offs = CORE_MOD,
307 .module_offs = CORE_MOD,
393 .module_offs = CORE_MOD,
408 .module_offs = CORE_MOD,
470 .module_offs = CORE_MOD,
649 .module_offs = CORE_MOD,
664 .module_offs = CORE_MOD,
679 .module_offs = CORE_MOD,
868 .module_offs = CORE_MOD,
914 .module_offs = CORE_MOD,
[all …]
Dprm3xxx.c276 CORE_MOD, OMAP2_RM_RSTCTRL); in omap3_prm_reset_modem()
277 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP2_RM_RSTCTRL); in omap3_prm_reset_modem()
353 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); in omap3_prm_init_pm()
354 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3); in omap3_prm_init_pm()
361 omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP2_RM_RSTST); in omap3_prm_init_pm()
Dpowerdomains3xxx_data.c97 .prcm_offs = CORE_MOD,
114 .prcm_offs = CORE_MOD,
136 .prcm_offs = CORE_MOD,
Dpowerdomains2xxx_data.c58 .prcm_offs = CORE_MOD,
Dpm34xx.c153 c += omap_prm_clear_mod_irqs(CORE_MOD, 1, ~0); in _prcm_int_handle_wakeup()
156 c += omap_prm_clear_mod_irqs(CORE_MOD, 3, ~0); in _prcm_int_handle_wakeup()
Dprcm-common.h24 #define CORE_MOD 0x200 macro
Dsleep34xx.S29 #define PM_PREPWSTST_CORE_P OMAP3430_PRM_BASE + CORE_MOD +\
32 #define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)