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Searched refs:CLK_TOP_SYSPLL1_D2 (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dmt7629-clk.h35 #define CLK_TOP_SYSPLL1_D2 25 macro
Dmt7622-clk.h31 #define CLK_TOP_SYSPLL1_D2 19 macro
Dmt6797-clk.h47 #define CLK_TOP_SYSPLL1_D2 37 macro
Dmt8173-clk.h54 #define CLK_TOP_SYSPLL1_D2 44 macro
Dmt2712-clk.h37 #define CLK_TOP_SYSPLL1_D2 6 macro
Dmt2701-clk.h16 #define CLK_TOP_SYSPLL1_D2 6 macro
/Linux-v5.4/arch/arm/boot/dts/
Dmt7629.dtsi255 assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>;
309 assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>,
372 <&topckgen CLK_TOP_SYSPLL1_D2>,
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt7629.c403 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "mainpll", 1, 4),
Dclk-mt6797.c28 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
Dclk-mt7622.c397 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "mainpll", 1, 4),
Dclk-mt2701.c63 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
Dclk-mt2712.c58 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1,
Dclk-mt8173.c87 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "main_h546m", 1, 2),