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Searched refs:CLK_TOP_RTC_SEL (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dmt8173-clk.h130 #define CLK_TOP_RTC_SEL 120 macro
Dmt2712-clk.h168 #define CLK_TOP_RTC_SEL 137 macro
Dmt2701-clk.h112 #define CLK_TOP_RTC_SEL 101 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt8173.c593 MUX(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents, 0x00d0, 24, 2),
921 clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_RTC_SEL]); in mtk_clk_enable_critical()
Dclk-mt2701.c540 MUX_GATE_FLAGS(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents,
Dclk-mt2712.c823 MUX_GATE_FLAGS(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents, 0x0d0, 24, 2,
/Linux-v5.4/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi459 <&topckgen CLK_TOP_RTC_SEL>;