Searched refs:CLK_TOP_PWM_SEL (Results 1 – 16 of 16) sorted by relevance
/Linux-v5.4/include/dt-bindings/clock/ |
D | mt7629-clk.h | 87 #define CLK_TOP_PWM_SEL 77 macro
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D | mt8516-clk.h | 188 #define CLK_TOP_PWM_SEL 156 macro
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D | mt7622-clk.h | 72 #define CLK_TOP_PWM_SEL 60 macro
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D | mt8173-clk.h | 96 #define CLK_TOP_PWM_SEL 86 macro
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D | mt2712-clk.h | 133 #define CLK_TOP_PWM_SEL 102 macro
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D | mt2701-clk.h | 94 #define CLK_TOP_PWM_SEL 83 macro
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/Linux-v5.4/Documentation/devicetree/bindings/pwm/ |
D | pwm-mediatek.txt | 31 clocks = <&topckgen CLK_TOP_PWM_SEL>,
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/Linux-v5.4/drivers/clk/mediatek/ |
D | clk-mt7629.c | 496 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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D | clk-mt8516.c | 419 MUX(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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D | clk-mt7622.c | 525 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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D | clk-mt2701.c | 497 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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D | clk-mt2712.c | 745 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel",
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D | clk-mt8173.c | 547 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0050, 0, 2, 7),
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/Linux-v5.4/arch/arm64/boot/dts/mediatek/ |
D | mt7622.dtsi | 432 clocks = <&topckgen CLK_TOP_PWM_SEL>,
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D | mt2712e.dtsi | 426 clocks = <&topckgen CLK_TOP_PWM_SEL>,
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/Linux-v5.4/arch/arm/boot/dts/ |
D | mt7623.dtsi | 446 clocks = <&topckgen CLK_TOP_PWM_SEL>,
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