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Searched refs:CLK_TOP_MUX_MSDC50_0 (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dmt6797-clk.h27 #define CLK_TOP_MUX_MSDC50_0 17 macro
Dmt8183-clk.h44 #define CLK_TOP_MUX_MSDC50_0 8 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt6797.c347 MUX_GATE(CLK_TOP_MUX_MSDC50_0, "msdc50_0_sel", msdc50_0_parents,
Dclk-mt8183.c580 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_MSDC50_0, "msdc50_0_sel",