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Searched refs:CLK_TOP_MSDCPLL_D2 (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dmt6797-clk.h102 #define CLK_TOP_MSDCPLL_D2 92 macro
Dmt8173-clk.h48 #define CLK_TOP_MSDCPLL_D2 38 macro
Dmt2712-clk.h111 #define CLK_TOP_MSDCPLL_D2 80 macro
Dmt8183-clk.h122 #define CLK_TOP_MSDCPLL_D2 86 macro
Dmt6779-clk.h97 #define CLK_TOP_MSDCPLL_D2 87 macro
Dmt2701-clk.h48 #define CLK_TOP_MSDCPLL_D2 38 macro
/Linux-v5.4/Documentation/devicetree/bindings/mmc/
Dmtk-sd.txt67 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt6797.c83 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll_ck", 1, 2),
Dclk-mt2701.c98 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
Dclk-mt6779.c97 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
Dclk-mt8183.c158 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1,
Dclk-mt2712.c204 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll_ck", 1,
Dclk-mt8173.c80 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),